NE56610-39GW PHILIPS [NXP Semiconductors], NE56610-39GW Datasheet - Page 7

• Manufacturer Part Number: NE56610-39GW
• Description: Family of devices designed to generate a reset signal for a variety of microprocessor and logic systems
• Manufacturer: PHILIPS [NXP Semiconductors]

TIMING DIAGRAM
of the device. Letters indicate events on the Time axis.
rise. Also the Reset voltage initially rises but then abruptly
returns to a low state. This is due to V
(approximately 0.8V) that activates the internal bias circuitry.
This is caused by and coincident to V
level of V
Reset output remains off as V
normal.
threshold and the "H" transport delay time (T
At this point the device removes the hold on the V
V
reset from the microprocessor, allowing it to function normally.
it. V
reached at "E". At that time, reset signal is generated (V
Reset goes low).
February 23, 2001
Figure 15. Timing Diagram
OUT
The Timing Diagram shown in Figure 15 depicts the operation
A: At start-up, event "A", the V
B: At event "B", the "H" transport delay time (T
C: At event "C" V
In a microprocessor based system these events remove the
D-E: At "D", V
CC
Reset goes high.
V
V
M/R
V
V
continues to sag until the VSL undervoltage threshold is
CC
OUT
SH
SL
SH
. At this level the device is in full operation. The
V
V
V
A
CC
CC
begins to ramp down causing V
B
is above the undervoltage detect
B
CC
T
PLH
V
CC
rises above V
RES
and Reset voltages begin to
CC
CC
reaching the threshold
reaching the level
C
C
PLH
SH
PLH
) has elapsed.
E
. This is
D
OUT
OUT
) is initiated.
reset.
F
to follow
T
OUT
PLH
7 of 9
G
V
increasing.
the "H" transport delay time (T
and the "H" transport delay time (T
the device removes the hold on the V
goes high.
from the logic device is applied at the M/R pin. With the falling
edge of the manual reset signal, the "H" transport delay time
(T
elapsed and the Vout reset goes high.
undervoltage threshold point is reached and at that level V
reset goes low.
where normal internal circuit bias is no longer able to maintain a
V
less than 0.8V. As V
decreases to zero.
S
H
H
OUT
PLH
E-F: Between "E" and "F", V
F: At "F", V
G: At "G", V
H-J: At event "H", V
K: At event "K" V
L: At event "L" the V
) is initiated. At "J", transport delay time (T
reset and as a result may exhibit a slight rise to something
T
CC
PLH
CC
reaches the V
is above the undervoltage detect threshold
CC
CC
J
sags to the point where the V
CC
CC
decays even further, V
voltage has deteriorated to a level
is normal, but a manual reset signal
PLH
K
SH
CC
K
upper threshold. Once again,
) is initiated.
PLH
recovers and starts
L
L
OUT
) has elapsed. At this point
TIME
reset. V
document number here
VS
OUT
PLH
System Reset
reset also
OU
) has
SL
T Reset
OUT