54F273 NSC [National Semiconductor], 54F273 Datasheet - Page 2

• Manufacturer Part Number: 54F273
• Description: Octal D Flip-Flop
• Manufacturer: NSC [National Semiconductor]

Unit Loading Fan Out
Logic Diagram
D
MR
CP
Q
Pin Names
0
0
Operating Mode
Reset (Clear)
Load ‘1’
Load ‘0’
–D
–Q
7
7
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
Data Inputs
Master Reset (Active LOW)
Clock Pulse Input (Active Rising Edge)
Data Outputs
Mode Select-Function Table
DIP SOIC and Flatpak
Pin Assignment for
MR
H
H
L
Description
Inputs
CP
X
D
X
h
l
n
Connection Diagrams
TL F 9511–1
Output
Q
H
L
L
HIGH LOW Output I
n
50 33 3
1 0 1 0
1 0 1 0
1 0 1 0
U L
2
H
h
L
I
transition
X
54F 74F
e
e
e
e
e
HIGH Voltage Level one setup time prior to the LOW-to-HIGH clock
transition
e
20 A
20 A
20 A
LOW Voltage Level one setup time prior to the LOW-to-HIGH clock
LOW Voltage Level steady state
Immaterial
HIGH Voltage Level steady state
b
Input I
LOW-to-HIGH clock transition
1 mA 20 mA
b
b
b
IH
OH
0 6 mA
0 6 mA
0 6 mA
I
IL
I
OL
Pin Assignment
for LCC
TL F 9511– 2
TL F 9511– 4