54F273 NSC [National Semiconductor], 54F273 Datasheet

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54F273

Manufacturer Part Number
54F273
Description
Octal D Flip-Flop
Manufacturer
NSC [National Semiconductor]
Datasheet

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C 1995 National Semiconductor Corporation
54F 74F273
Octal D Flip-Flop
General Description
The ’F273 has eight edge-triggered D-type flip-flops with in-
dividual D inputs and Q outputs The common buffered
Clock (CP) and Master Reset (MR) inputs load and reset
(clear) all flip-flops simultaneously
The register is fully edge-triggered The state of each D in-
put one setup time before the LOW-to-HIGH clock tran-
sition is transferred to the corresponding flip-flop’s Q out-
put
All outputs will be forced LOW independently of Clock or
Data inputs by a LOW voltage level on the MR input The
device is useful for applications where the true output only is
required and the Clock and Master Reset are common to all
storage elements
Logic Symbols
TRI-STATE is a registered trademark of National Semiconductor Corporation
Note 1 Devices also available in 13 reel Use suffix
Note 2 Military grade device with environmental and burn-in processing Use suffix
74F273PC
74F273SC (Note 1)
74F273SJ (Note 1)
Commercial
54F273DM (Note 2)
54F273FM (Note 2)
54F273LM (Note 2)
TL F 9511
Military
e
SCX and SJX
TL F 9511 – 3
Package
N20A
J20A
M20B
M20D
W20A
E20A
Number
Features
Y
Y
Y
Y
Y
Y
Y
Y
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
Ideal buffer for MOS microprocessor or memory
Eight edge-triggered D flip-flops
Buffered common clock
Buffered asynchronous Master Reset
See ’F377 for clock enable version
See ’F373 for transparent latch version
See ’F374 for TRI-STATE version
Guaranteed 4000V minimum ESD protection
e
DMQB FMQB and LMQB
Package Description
IEEE IEC
RRD-B30M75 Printed in U S A
TL F 9511 – 5
May 1995

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54F273 Summary of contents

Page 1

... Note 1 Devices also available in 13 reel Use suffix Note 2 Military grade device with environmental and burn-in processing Use suffix Logic Symbols TRI-STATE is a registered trademark of National Semiconductor Corporation C 1995 National Semiconductor Corporation ...

Page 2

Pin Assignment for DIP SOIC and Flatpak Unit Loading Fan Out Pin Names Description D –D Data Inputs Master Reset (Active LOW) CP Clock Pulse Input (Active Rising Edge) Q –Q Data Outputs 0 7 Mode Select-Function ...

Page 3

Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature b Ambient Temperature under Bias b Junction Temperature under Bias b Plastic b V Pin Potential ...

Page 4

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency max t Propagation Delay PLH t Clock to Output PHL t Propagation Delay PLH Output PHL AC Operating Requirements Symbol Parameter t (H) Setup Time HIGH or LOW ...

Page 5

Physical Dimensions inches (millimeters) 20-Lead Ceramic Leadless Chip Carrier (LCC) 20-Lead Ceramic Dual-In-Line Package (D) NS Package Number E20A NS Package Number J20A 5 ...

Page 6

Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Small Outline Package JEDEC (S) 20-Lead (0 300 Wide) Molded Small Outline Package EIAJ (SJ) NS Package Number M20B NS Package Number M20D 6 ...

Page 7

Physical Dimensions inches (millimeters) (Continued) 20-Lead (0 300 Wide) Molded Dual-In-Line Package (P) NS Package Number N20A 7 Lit 114645 ...

Page 8

Physical Dimensions inches (millimeters) (Continued) LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 ...

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