PPC440GX-3FF533C AMCC [Applied Micro Circuits Corporation], PPC440GX-3FF533C Datasheet - Page 80

• Manufacturer Part Number: PPC440GX-3FF533C
• Description: Power PC 440GX Embedded Processor
• Manufacturer: AMCC [Applied Micro Circuits Corporation]

440GX – Power PC 440GX Embedded Processor
80
DDR SDRAM Write Operation
The following diagram illustrates the relationship among the signals involved with a DDR write operation.
DDR SDRAM Write Cycle Timing
MemClkOut0(90)
MemClkOut0
T
T
T
T
T
T
HD
SA
SD
DS
SK
HA
Addr/Cmd
MemData
PLB Clk
= Setup time for address and command signals to MemClkOut0(90)
= Hold time for data signals (minimum time data is valid after rising/falling edge of DSQ)
= Delay from rising/falling edge of clock to the rising/falling edge of DQS
= Delay from rising edge of MemClkOut0(0) to rising/falling edge of signal (skew)
= Hold time for address and command signals from MemClkOut0(90)
= Setup time for data signals (minimum time data is valid before rising/falling edge of DSQ)
DQS
T
SK
T
T
SA
HA
T
DS
T
SD
T
T
HD
DS
T
SD
T
HD
Revision 1.15 – August 30, 2007
Data Sheet
AMCC