HYS64V4200GU-10 SIEMENS [Siemens Semiconductor Group], HYS64V4200GU-10 Datasheet - Page 9
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HYS64V4200GU-10
Manufacturer Part Number
HYS64V4200GU-10
Description
3.3V 4M x 64/72-Bit 1 BANK SDRAM Module 3.3V 8M x 64/72-Bit 2 BANK SDRAM Module
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.HYS64V4200GU-10.pdf
(15 pages)
Parameter
Refresh Cycle
Refresh Period (4096 cycles)
Self Refresh Exit Time
Read Cycle
Data Out Hold Time
Data Out to Low Impedance
Data Out to High Impedance
DQM Data Out Disable Latency
Write Cycle
Data input to Precharge
(write recovery)
Data In to Active/refresh
DQM Write Mask Latency
Semiconductor Group
Symbol
t
t
t
t
t
t
t
t
t
REF
SREX
OH
LZ
HZ
DQZ
DPL
DAL
DQW
min. max. min. max. min. max.
PC100-222
10
–
3
0
3
–
2
5
0
9
-8
64
–
–
–
8
2
–
–
–
Limit Values
PC100-323
10
–
3
0
3
–
2
5
0
-8B
HYS64(72)V4200/8220GU
64
10
–
2
–
–
–
10
–
3
0
3
–
0
2
5
SDRAM-Modules
PC66
-10
64
10
–
–
–
2
–
–
–
Unit
ms
ns
ns
ns
ns
CLK
CLK
CLK
CLK
Note
8)
9)
4)
10)