M368L6423ETN-A2 SAMSUNG [Samsung semiconductor], M368L6423ETN-A2 Datasheet - Page 3
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M368L6423ETN-A2
Manufacturer Part Number
M368L6423ETN-A2
Description
DDR SDRAM Unbuffered Module
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.M368L6423ETN-A2.pdf
(22 pages)
256MB, 512MB Unbuffered DIMM
184Pin Unbuffered DIMM based on 256Mb E-die (x8,)
Ordering Information
Operating Frequencies
Feature
• Power supply : Vdd: 2.5V ± 0.2V, Vddq: 2.5V ± 0.2V
• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 2, 2.5 (clock)
• Programmable Burst length (2, 4, 8)
• Programmable Burst type (sequential & interleave)
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval(8K/64ms refresh)
• Serial presence detect with EEPROM
• PCB : Height 1,250 (mil), single (256MB), double (512MB) sided
M381L3223ETM-C(L)B3/AA/A2/B0
M381L6423ETM-C(L)B3/AA/A2/B0
M368L3223ETN-C(L)B3/AA/A2/B0
M368L6423ETN-C(L)B3/AA/A2/B0
Speed @CL2.5
CL-tRCD-tRP
Speed @CL2
SAMSUNG ELECTRONICS CO., Ltd. reserves the right to change products and specifications without notice.
Part Number
B3(DDR333@CL=2.5)
133MHz
166MHz
2.5-3-3
Density
256MB
256MB
512MB
512MB
AA(DDR266@CL=2)
133MHz
133MHz
Organization
2-2-2
32M x 64
32M x 72
64M x 64
64M x 72
A2(DDR266@CL=2)
32Mx8 (K4H560838E) * 8EA
32Mx8 (K4H560838E) * 9EA
32Mx8 (K4H560838E) * 16EA
32Mx8 (K4H560838E) * 18EA
Component Composition
133MHz
133MHz
2-3-3
Rev. 1.1 August. 2003
DDR SDRAM
B0(DDR266@CL=2.5)
100MHz
133MHz
2.5-3-3
1,250mil
1,250mil
1,250mil
1,250mil
Height