M368L6423ETN-A2 SAMSUNG [Samsung semiconductor], M368L6423ETN-A2 Datasheet - Page 12
![no-image](/images/no-image-200.jpg)
M368L6423ETN-A2
Manufacturer Part Number
M368L6423ETN-A2
Description
DDR SDRAM Unbuffered Module
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet
1.M368L6423ETN-A2.pdf
(22 pages)
Note : 1. VID is the magnitude of the difference between the input level on CK and the input on CK.
AC Operating Conditions
Input/Output Capacitance
256MB, 512MB Unbuffered DIMM
Input High (Logic 1) Voltage, DQ, DQS and DM signals
Input Low (Logic 0) Voltage, DQ, DQS and DM signals.
Input Differential Voltage, CK and CK inputs
Input Crossing Point Voltage, CK and CK inputs
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0)
Input capacitance( CS0)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7, DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
Input capacitance(A0 ~ A12, BA0 ~ BA1,RAS,CAS,WE )
Input capacitance(CKE0,CKE1)
Input capacitance( CS0, CS1)
Input capacitance( CLK0, CLK1,CLK2)
Input capacitance(DM0~DM7, DM8(for ECC))
Data & DQS input/output capacitance(DQ0~DQ63)
Data input/output capacitance (CB0~CB7)
2. The value of V
3. These parameters should be tested at the pim on actual components and may be checked at either the pin or the pad in
simulation. the AC and DC input specificatims are refation to a Vref envelope that has been bandwidth limited 20MHz.
Parameter/Condition
IX
Parameter
Parameter
is expected to equal 0.5*V
Output
Output Load Circuit (SSTL_2)
DDQ
Z0=50Ω
of the transmitting device and must track variations in the DC level of the same.
C
LOAD
Symbol
Symbol
Cout2
Cout2
Cout1
Cout1
CIN1
CIN2
CIN3
CIN4
CIN5
CIN1
CIN2
CIN3
CIN4
CIN5
=30pF
V
tt
Symbol
VIH(AC)
VIL(AC)
VID(AC)
VIX(AC)
=0.5*V
R
DDQ
Min
Min
T
49
42
42
25
M368L3223ETN
65
42
42
28
10
M368L6423ETN
10
6
6
=50Ω
-
-
0.5*VDDQ-0.2
VREF + 0.31
V
=0.5*V
REF
Min
0.7
DDQ
(VDD=2.5V, VDDQ=2.5V, TA= 25°C, f=1MHz)
Max
Max
57
50
50
30
81
50
50
34
12
12
7
7
-
-
0.5*VDDQ+0.2
VREF - 0.31
VDDQ+0.6
Rev. 1.1 August. 2003
Max
Min
Min
M381L3223ETM
51
44
44
25
M381L6423ETM
69
44
44
28
10
10
10
6
6
6
DDR SDRAM
Unit
Max
Max
V
V
V
V
60
53
53
30
87
53
53
34
12
12
12
7
7
7
Note
Unit
Unit
3
3
1
2
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF
pF