HYS6472V16200GU SIEMENS [Siemens Semiconductor Group], HYS6472V16200GU Datasheet - Page 9

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HYS6472V16200GU

Manufacturer Part Number
HYS6472V16200GU
Description
3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
AC Characteristics
T
Parameter
Clock and Clock Enable
Clock Cycle Time
System Frequency
Clock Access Time
Clock High Pulse Width
Clock Low Pulse Width
Input Setup Time
Input Hold Time
CKE Setup Time
(Power down mode)
CKE Setup Time
(Self Refresh Exit)
Transition Time (rise and fall)
Common Parameters
RAS to CAS Delay
Cycle Time
Active Command Period
Precharge Time
Bank to Bank Delay Time
CAS to CAS Delay Time
(same bank)
Semiconductor Group
A
= 0 to 70 C;
V
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
CAS Latency = 3
CAS Latency = 2
SS
= 0 V;
1, 2
V
CC
= 3.3 V
Symbol
t
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CK
CK
AC
CH
CL
CS
CH
CKSP
CKSR
T
RCD
RC
RAS
RP
RRD
CCD
0.3 V,
10
10
3
3
2
1
2
10
1
20
70
48
20
16
1
min.
t
9
T
PC100-222
HYS 64(72)V16200/3222(0)0/64220GU
= 1 ns
-8
100
100
6
6
max.
Limit Values
10
12
3
3
2
1
2
20
70
48
30
20
1
min.
PC100-323
-8B
100
83
6
7
SDRAM Modules
max.
Unit
ns
ns
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CLK
1998-08-01
Note
3, 4
4
4
5
5
6
7

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