HYS6472V16200GU SIEMENS [Siemens Semiconductor Group], HYS6472V16200GU Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
HYS6472V16200GU
Manufacturer Part Number
HYS6472V16200GU
Description
3.3 V 16M x 64/72-Bit SDRAM Modules 3.3 V 32M x 64/72-Bit SDRAM Modules 3.3 V 64M x 64/72-Bit SDRAM Modules
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
1.HYS6472V16200GU.pdf
(17 pages)
Block Diagram for 16M
(HYS 64/72V16200GU & HYS 64/72V32200GU)
Semiconductor Group
V
V
WE
CS0
DQMB0
DQ(7:0)
DQMB1
DQ(15:8)
CB(7:0)
CS2
DQMB2
DQ(23:16)
DQMB3
DQ(31:24)
A0-A11, (A12), BA0, BA1
RAS
CAS
CKE0
Note: D8 is only used in the x72 ECC version.
CC
SS
C
DQM
DQ0-DQ7
DQM
DQ0-DQ7
DQM
DQ0-DQ7
DQM
DQ0-DQ7
DQM
DQ0-DQ7
CS
CS
CS
CS
CS
64/72 & 32M
WE
WE
WE
WE
WE
D0
D8
D2
D3
D1
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
D0-D7, (D8)
64/72 one bank SDRAM DIMM Modules
5
HYS 64(72)V16200/3222(0)0/64220GU
DQMB4
DQ(39:32)
DQMB5
DQ(47:40)
DQMB6
DQ(55:48)
DQMB7
DQ(63:56)
CLK0
CLK1
CLK2
CLK3
SA0
SA1
SA2
SCL
4 SDRAM + 3.3 pF
Termination
4 SDRAM + 3.3 pF
Termination
E PROM (256 word x 8 Bit)
2
32 M x 64
DQM
DQ0-DQ7
DQM
DQ0-DQ7
DQM
DQ0-DQ7
DQM
DQ0-DQ7
SA0
SA1
SA2
SCL
Clock Wiring
CS
CS
CS
CS
SDRAM Modules
SDA
WE
WE
WE
WE
WP
D4
D5
D6
D7
5 SDRAM
Termination
4 SDRAM + 3.3 pF
Termination
32 M x 72
47 k
1998-08-01
SPB03970