MT18LD472AG-5X MICRON [Micron Technology], MT18LD472AG-5X Datasheet - Page 16

• Manufacturer Part Number: MT18LD472AG-5X
• Description: 2, 4 MEG x 72 NONBUFFERED DRAM DIMMs
• Manufacturer: MICRON [Micron Technology]

OBSOLETE
NOTES (continued)
28. The SPD EEPROM WRITE cycle time (
2, 4 Meg x 72 Nonbuffered DRAM DIMMs
DM60.p65 – Rev. 6/98
time from a valid stop condition of a write sequence
to the end of the EEPROM internal erase/program
cycle. During the WRITE cycle, the EEPROM bus
interface circuit are disabled, SDA remains HIGH due
to pull-up resistor, and the EEPROM does not
respond to its slave address.
t
WR) is the
16
29. If OE# is tied permanently LOW, LATE WRITE or
30. V
READ-MODIFY-WRITE operations are not possible.
width
than one third of the cycle rate. V
(MIN) = -2V for a pulse width
width cannot be greater than one third of the cycle
rate.
IH
overshoot: V
NONBUFFERED DRAM DIMMs
Micron Technology, Inc., reserves the right to change products or specifications without notice.
10ns, and the pulse width cannot be greater
IH
(MAX) = V
DD
2, 4 MEG x 72
10ns, and the pulse
IL
+ 2V for a pulse
undershoot: V
1998, Micron Technology, Inc.
IL