MT8LSDT3264AG-133 MICRON [Micron Technology], MT8LSDT3264AG-133 Datasheet

no-image

MT8LSDT3264AG-133

Manufacturer Part Number
MT8LSDT3264AG-133
Description
SYNCHRONOUS DRAM MODULE
Manufacturer
MICRON [Micron Technology]
Datasheet
SYNCHRONOUS
DRAM MODULE
Features
• PC100- and PC133-compliant
• JEDEC-standard 168-pin, dual in-line memory
• Unbuffered
• 256MB (32 Meg x 64), 512MB (64 Meg x 64)
• Single +3.3V ±0.3V power supply
• Fully synchronous; all signals registered on positive
• Internal pipelined operation; column address can
• Internal SDRAM banks for hiding row access/precharge
• Programmable burst lengths: 1, 2, 4, 8, or full page
• Auto Precharge, including Concurrent Auto
• 64ms, 8,192 cycle Auto Refresh cycle
• Self Refresh Mode
• LVTTL-compatible inputs and outputs
• Serial Presence-Detect (SPD)
NOTE:
Table 1:
32,64 Meg x 64 SDRAM DIMMs
SD8_16C32_64x64AG_C.fm - Rev. C 11/02
OPTIONS
• Package
• Operating Temperature Range
• Memory Clock/CAS Latency
1. Consult Micron for availability; Industrial Tempera-
Refresh Count
Device Banks
Device Configuration
Row Addressing
Column Addressing
Module Banks
module (DIMM)
edge of system clock
be changed every clock cycle
Precharge, and Auto Refresh Modes
ture Option available in -133 speed only.
Unbuffered
168-pin DIMM (gold)
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
(133 MHz)/CL = 2
(133 MHz)/CL = 3
(100 MHz)/CL = 2
Address Table
4 (BA0, BA1)
8K (A0–A12)
1K (A0–A9)
32 Meg x 8
MODULE
1 (S0,S2)
256MB
8K
1
2 (S0,S2; S1,S3)
MARKING
4 (BA0, BA1)
8K (A0–A12)
1K (A0–A9)
32 Meg x 8
MODULE
512MB
None
8K
-13E
-133
-10E
A
G
I
1
Table 2:
Table 3:
NOTE:
MT8LSDT3264A(I) - 256MB
MT16LSDT6464A(I) - 512MB
For the latest data sheet, please refer to the Micron Web
site:
PARTNUMBER
MT8LSDT3264AG-13E_
MT8LSDT3264AG(I)-133_
MT8LSDT3264AG-10E_
MT16LSDT6464AG-13E_
MT16LSDT6464AG(I)-133_
MT16LSDT6464AG-10E_
1. The designators for component and PCB revision
are the last two characters of each part number.
Consult factory for current revision codes. Example:
MT8LSDT3264AG-133B1.
MARKINGS
Figure 1: 168-Pin DIMM (MO–161)
MODULE
www.micron.com/moduleds
Micron Technology, Inc., reserves the right to change products or specifications without notice.
-13E
-133
-10E
1
Timing parameters
Part Numbers
168-PIN SDRAM DIMMs
256MB / 512MB (x64)
CL -
2 - 2 - 2
2 - 2 - 2
2 - 2 - 2
PC100
Low Profile
t
RCD -
Standard
CONFIGURATION
32 Meg x 64
32 Meg x 64
32 Meg x 64
64 Meg x 64
64 Meg x 64
64 Meg x 64
t
RP
CL -
©2002, Micron Technology Inc.
2 - 2 - 2
3 - 3 - 3
PC133
t
RCD -
NA
BUS SPEED
SYSTEM
133 MHz
133 MHz
100 MHz
133 MHz
133 MHz
100 MHz
t
RP

Related parts for MT8LSDT3264AG-133

MT8LSDT3264AG-133 Summary of contents

Page 1

... The designators for component and PCB revision 32 Meg x 8 are the last two characters of each part number. 8K (A0–A12) Consult factory for current revision codes. Example: 1K (A0–A9) MT8LSDT3264AG-133B1. 2 (S0,S2; S1,S3) Micron Technology, Inc., reserves the right to change products or specifications without notice. 1 256MB / 512MB (x64) 168-PIN SDRAM DIMMs ...

Page 2

... PIN 1 Back View (Populated only for 512MB module) U11 U12 PIN 168 See Figure 10, 256MB Module Dimensions, on page 23 and Figure 11, 512MB Module Dimensions, on page 24 for module dimensions. 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 Table 5: PIN SYMBOL PIN SYMBOL PIN SYMBOL PIN SYMBOL ...

Page 3

... The address inputs also provide the op-code during a MODE REGISTER SET command. SCL Input Serial Clock for Presence-Detect: SCL is used to synchronize the presence-detect data transfer to and from the module. SA0-SA2 Input Presence-Detect Address Inputs: These pins are used to configure the presence-detect device. ...

Page 4

... TYPE DESCRIPTION V Supply Power Supply: +3.3V ±0.3V Supply Ground – Not Connected: These pins are not connected on these modules. Micron Technology, Inc., reserves the right to change products or specifications without notice. 4 256MB / 512MB (x64) 168-PIN SDRAM DIMMs ©2002, Micron Technology Inc. ...

Page 5

... V V SCL WP Notes: All resistor values are 10 W unless otherwise specified. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at: www.micron.com/numberguide. 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 Figure 3: Functional Block Diagram Single Bank Modules ...

Page 6

... Notes: All resistor values are 10 W unless otherwise specified. Per industry standard, Micron modules use various component speed grades as referenced in the module part numbering guide at: www.micron.com/numberguide. 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 Figure 4: Functional Block Diagram Dual Bank Modules ...

Page 7

... The SPD function is implemented using a 2,048-bit EEPROM. This nonvolatile storage device contains 256 bytes. The first 128 bytes can be pro- grammed by Micron to identify the module type and various SDRAM organizations and timing parameters. The remaining 128 bytes of storage are available for use by the customer ...

Page 8

MAND INHIBIT or NOP . Starting at some point during this 100µs period and continuing at least through the end of this period, COMMAND INHIBIT or NOP com- mands should be applied. Once the 100µs delay has been satisfied with ...

Page 9

Diagram 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 256MB / 512MB (x64) 168-PIN SDRAM DIMMs Table 7: Burst Definitions STARTING BURST COLUMN ORDER OF ACCESSES WITHIN LENGTH ADDRESS TYPE = SEQUENTIAL ...

Page 10

CAS Latency The CAS latency is the delay, in clock cycles, between the registration of a READ command and the availability of the first piece of output data. The latency can be set to two or three clocks ...

Page 11

Commands The Truth Table provides a quick reference of avail- able commands. This is followed by written descrip- tion of each command. For a more detailed descrip- Table 9: Truth Table – SDRAM Commands and DQMB Operation CKE is HIGH ...

Page 12

... Output High Voltage (I = -4mA) OUT Output Low Voltage (I = 4mA) OUT Table 11: DC Electrical Characteristics and Operating Conditions – 512MB Module Notes notes appear on page 17; V PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Logic 1; All inputs INPUT LOW VOLTAGE: Logic 0; All inputs INPUT LEAKAGE CURRENT: Any input 0V £ ...

Page 13

... AUTO REFRESH CURRENT CKE = HIGH; CS# = HIGH SELF REFRESH CURRENT: CKE £ 0.2V NOTE Value calculated as one module bank in this condition, and all other module banks in Power-Down Mode ( Value calculated reflects all module banks in this condition. 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/ +3.3v ± ...

Page 14

... Input Capacitance: A0-A12, BA0, BA1, RAS#, CAS#, WE# Input Capacitance: CK Input Capacitance: S# Input Capacitance: CKE Input Capacitance: DQMB Input/Output Capacitance: SCL, SA, SDA Input/Output Capacitance: DQ Table 15: Capacitance – 512MB Module Note 2; notes appear on page 17 PARAMETER Input Capacitance: A0-A12, BA0, BA1, RAS#, CAS#, WE# Input Capacitance: CK Input Capacitance: S# Input Capacitance: CKE ...

Page 15

... Table 16: Electrical Characteristics and Recommended AC Operating Conditions Notes 11; notes appear on page 17 Module AC timing parameters comply with PC100 and PC133 Design Specs, based on component parameters ACCHARACTERISTICS PARAMETER Access timefrom CLK (pos.edge) Address hold time Address setup time CLK high-level width ...

Page 16

Table 17: AC Functional Characteristics Notes 11; notes appear on page 17 PARAMETER READ/WRITE command to READ/WRITE command CKE to clock disable or power-down entry mode CKE to clock enable or power-down exit setup ...

Page 17

... Micron Technology, Inc., reserves the right to change products or specifications without notice ...

Page 18

SPD Clock and Data Conventions Data states on the SDA line can change only during SCL LOW. SDA state changes during SCL HIGH are reserved for indicating start and stop conditions (as shown in Figure 7 and Figure 8). SPD ...

Page 19

Table 18: EEPROM Device Select Code The most significant bit (b7) is sent first Memory Area Select Code (two arrays) Protection Register Select Code Table 19: EEPROM Operating Modes MODE RW BIT Current Address Read RandomAddressRead Sequential Read Byte Write ...

Page 20

SCL t SU:STA SDA IN SDA OUT Table 21: Serial Presence-Detect EEPROM AC Operating Conditions V = +3.3V ±0.3V; All voltages referenced PARAMETER/CONDITION SCL LOW to SDA data-out valid Time the bus must be free before a ...

Page 21

... TOTAL NUMBER OF SPD MEMORY BYTES 2 MEMORY TYPE 3 NUMBER OF ROWADDRESSES 4 NUMBER OF COLUMN ADDRESSES 5 NUMBER OF MODULE BANKS 6 MODULE DATA WIDTH 7 MODULE DATA WIDTH (continued) 8 MODULE VOLTAGE INTERFACE LEVELS 9 t SDRAM CYCLE TIME, CK (CAS LATENCY = 3) 10 SDRAM ACCESS FROM CLK, (CAS LATENCY = 3) 11 MODULE CONFIGURATION TYPE 12 REFRESH RATE/TYPE 13 ...

Page 22

... MODULE SERIAL NUMBER 99-125 MANUFACTURER-SPECIFIC DATA (RSVD) 126 SYSTEM FREQUENCY 127 SDRAM COMPONENT & CLOCK DETAIL NOTE The value of RAS used for -13E modules is calculated from 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 ENTRY (VERSION) 256MB t t 1.5ns (-13E/-133) AS, ...

Page 23

... Figure 10: 256MB Module Dimensions U1 U2 .079 (2.00) R (2X) .118 (3.00) (2X) .118 (3.00) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) .079 (2.00) R (2X .118 (3.00) (2X) .118 (3.00) TYP .118 (3.00) TYP 2.625 (66.68) PIN 1 (PIN 85 ON BACKSIDE) NOTE: All dimensions in inches (millimeters) 32,64 Meg x 64 SDRAM DIMMs SD8_16C32_64x64AG_C.fm - Rev. C 11/02 ...

Page 24

... Figure 11: 512MB Module Dimensions U1 .079 (2.00) R (2X) .118 (3.00) (2X) .118 (3.00) TYP .118 (3.00) TYP U11 PIN 168 .079 (2.00) R (2X) U1 .118 (3.00) (2X) .118 (3.00) TYP .118 (3.00) TYP U11 PIN 168 NOTE: All dimensions in inches (millimeters) 8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 E-mail: prodmktg@micron.com, Internet: http://www.micron.com, Customer Comment Line: 800-932-4992 Micron and the M logo are registered trademarks and the Micron logo is a trademark of Micron Technology, Inc ...

Related keywords