R1WV6416RBG-5SI RENESAS [Renesas Technology Corp], R1WV6416RBG-5SI Datasheet - Page 15

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R1WV6416RBG-5SI

Manufacturer Part Number
R1WV6416RBG-5SI
Description
64Mb Advanced LPSRAM (4M word x 16bit / 8M word x 8bit)
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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R1WV6416R Series
Low Vcc Data Retention Characteristics
Note 1. Typical parameter indicates the value for the center of distribution at 3.0V (Ta= 25ºC), and not 100% tested.
REJ03C0368-0001, Rev.0.01, 2008.03.24
Page 15 of 16
Chip select to data retention
Operation recovery time
Data retention current
2. Typical parameter indicates the value for the center of distribution at 3.0V (Ta= 40ºC), and not 100% tested.
3. BYTE# pin is supported for 48-pin TSOP (I) and 52-pin µTSOP (II) packages.
4. CS2 also controls address buffer, WE# buffer ,CS1# buffer ,OE# buffer ,LB# ,UB# buffer and Din buffer. If
V
CC
CS2 controls data retention mode, Vin levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high
impedance state. If CS1# controls data retention mode, CS2 must be CS2 ≥ Vcc-0.2V or0V ≤ CS2 ≤ 0.2V.
The other input levels (address, WE# ,OE#,CS1#,LB#,UB#,I/O) can be in the high impedance state.
for data retention
Parameter
time
Symbol
I
t
V
CCDR
CDR
t
DR
R
Min.
2.0
0
5
-
-
-
-
Typ
14
8
-
-
-
-
-
*1
*2
Max.
100
160
3.6
24
48
-
-
Unit
μA
μA
μA
μA
ms
ns
V
Vin ≥ 0V
BYTE# ≥ Vcc -0.2V or BYTE# ≤ 0.2V
(1) 0V ≤ CS2 ≤ 0.2V or
(2) CS1# ≥ V
(3) LB# = UB# ≥ V
~+25°C
~+40°C
~+70°C
~+85°C
See retention waveform.
CS2 ≥ V
CS1# ≤ 0.2V,
CS2 ≥ V
CC
CC
Vin ≥ 0V
BYTE# ≥ Vcc -0.2V or
BYTE# ≤0.2V
(1) 0V ≤ CS2 ≤ 0.2V or
(2) CS1# ≥ V
(3) LB# = UB# ≥ V
Test conditions
-0.2V or
-0.2V
CC
CS2 ≥ V
CS1# ≤ 0.2V,
CS2 ≥ V
-0.2V,
Preliminary
CC
-0.2V,
CC
CC
-0.2V or
-0.2V
CC
-0.2V,
*3,4
CC
-0.2V,

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