SSD1828Z ETC [List of Unclassifed Manufacturers], SSD1828Z Datasheet - Page 13

• Manufacturer Part Number: SSD1828Z
• Description: LCD Segment / Common Driver with Controller CMOS
• Manufacturer: ETC [List of Unclassifed Manufacturers]

6
8
SSD1828
6.1
6.2
6.3
6.4
6.5
6.6
6.7
PIN DESCRIPTION
Table 3 - PS0 & PS1 Interface
RES
This pin is reset signal input. When the pin is low, initialization of the chip is executed.
PS0
This pin pair with PS1 to determine the interface protocol between the driver and MCU. Refer to
PS1 pin descriptions for more details.
PS1
This pin pair with PS0 to determine the interface protocol between the driver and MCU,
according to the following table.
CS#
This pin is chip select input. The chip is enabled for display data/command transfer only when
CS is low.
D/C
This input pin is to identify display data/command cycle. When the pin is high, the data written to
the driver will be written into display RAM. When the pin is low, the data will be interpreted as
command. This pin must be connected to V
R/W(WR#)
This pin is microprocessor interface signal. When interfacing to a 6800-series microprocessor,
the signal indicates read mode when high and write mode when low. When interfacing to an
8080-microprocessor, a data write operation is initiated when R/W(WR) is low and the chip is
selected.
E(RD#)
This pin is microprocessor interface signal. When interfacing to an 6800-series microprocessor,
a data operation is initiated when E(RD) is high and the chip is selected. When interfacing to an
8080-microprocessor, a data read operation is initiated when E(RD) is low and the chip is
selected.
PS0
L
L
H
H
Rev 1.10
07/2002
PS1
L
H
L
H
3-wire SPI (write only)
4-wire SPI (write only)
8080 parallel interface (read and write allowed)
6800 parallel interface (read and write allowed)
Interface
SS
when 3-lines SPI interface is used. .
SOLOMON