K4D26323QG SAMSUNG [Samsung semiconductor], K4D26323QG Datasheet - Page 13

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K4D26323QG

Manufacturer Part Number
K4D26323QG
Description
128Mbit GDDR SDRAM
Manufacturer
SAMSUNG [Samsung semiconductor]
Datasheet

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K4D26323QG-GC
AC CHARACTERISTICS (I)
COMMAND
CK cycle time
CK high level width
CK low level width
DQS out access time from CK
Output access time from CK
Data strobe edge to Dout edge
Read preamble
Read postamble
CK to valid DQS-in
DQS-In setup time
DQS-in hold time
DQS write postamble
DQS-In high level width
DQS-In low level width
Address and Control input setup
Address and Control input hold
DQ and DM setup time to DQS
DQ and DM hold time to DQS
Clock half period
Data Hold skew factor
Data output hold time from DQS
Simplified Timing @ BL=2, CL=4
CK, CK
DQS
DM
DQ
CS
READA
Parameter
0
1
1
CL=3
CL=4
CL=5
CL=6
tCK
tCH
tCL
tDQSCK
tAC
tDQSQ
tRPRE
tRPST
tDQSS
tWPRES
tWPREH
tWPST
tDQSH
tDQSL
tIS
tIH
tDS
tDH
tHP
tQHS
tQH
Symbol
2
tCH
tCHmin
tCLmin
tQHS
-0.45
-0.45
0.45
0.45
0.85
0.35
0.45
0.45
tHP-
Min
2.5
0.9
0.4
0.4
0.6
0.6
0.3
0.3
tCK
or
0
-
-
-
-
-
3
tCL
tRPRE
-25
- 13 -
tAC
Max
10.0
0.55
0.55
0.45
0.45
0.28
1.15
0.55
0.55
1.1
0.6
0.6
0.4
-
-
-
-
-
-
-
-
4
tDQSCK
Qa1
tDQSQ
tCHmin
tCLmin
tQHS
-0.55
-0.55
2.86
0.45
0.45
0.85
0.35
0.45
0.45
0.35
0.35
tHP-
Min
0.9
0.4
0.4
0.8
0.8
or
0
-
-
-
-
-
tRPST
Qa2
-2A
5
Max
10.0
0.55
0.55
0.55
0.55
0.35
1.15
0.55
0.55
1.1
0.6
0.6
0.4
-
-
-
-
-
-
-
-
tIS
tIH
WRITEB
128M GDDR SDRAM
6
tCHmin
tCLmin
t
tQHS
WPRES
-0.55
-0.55
tHP-
0.45
0.45
0.85
0.35
0.45
0.45
0.35
0.35
Min
3.3
0.4
0.8
0.8
0.9
0.4
or
0
-
-
-
-
-
tDQSS
-33
t
WPREH
Rev 1.2(Mar. 2005)
Max
10.0
0.55
0.55
0.55
0.35
1.15
0.55
0.55
0.55
7
1.1
0.6
0.4
0.6
tDS tDH
-
-
-
-
-
-
-
-
Db0
tDQSH
Unit
Db1
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tDQSL
8
Note
1
1
1

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