M36L0R7040B0 STMICROELECTRONICS [STMicroelectronics], M36L0R7040B0 Datasheet - Page 7
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M36L0R7040B0
Manufacturer Part Number
M36L0R7040B0
Description
128 Mbit (Multiple Bank, Multi-Level, Burst) Flash Memory and 16 Mbit PSRAM, 1.8V Supply, Multi-Chip Package
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
1.M36L0R7040B0.pdf
(18 pages)
It is not allowed to set E
at V
PSRAM Write Enable (W
input controls writing to the PSRAM memory array.
W
PSRAM Output Enable (G
able gates the outputs through the data buffers
during a Read operation of the PSRAM memory.
G
PSRAM Upper Byte Enable (UB
Byte Enable input enables the upper byte for
PSRAM (DQ8-DQ15). UB
PSRAM Lower Byte Enable (LB
Byte Enable input enables the lower byte for
PSRAM (DQ0-DQ7). LB
V
supply to the internal cores of the Flash memory
component. It is the main power supply for all
Flash operations (Read, Program and Erase).
V
supply to the internal core of the PSRAM device. It
is the main power supply for all PSRAM opera-
tions.
V
supply for the Flash Memory I/O pins. This allows
all Outputs to be powered independently of the
Flash Memory core power supply, V
DDF
DDP
DDQ
P
P
is active low.
IH
is active low.
Supply Voltage. V
Supply Voltage. V
Supply Voltage. V
at the same time.
F
P
at V
DDF
P
P
is active low.
DDP
DDQ
). The Write Enable
P
is active low.
IL,
). The Output En-
provides the power
provides the power
provides the power
E1
P
P
P
). The Lower
). The Upper
at V
DDF
IL
.
and E2
P
V
Flash control input and a Flash power supply pin.
The two functions are selected by the voltage
range applied to the pin.
If V
V
age lower than V
tion against Program or Erase, while V
enables these functions (see Tables
Characteristics for the relevant values). V
only sampled at the beginning of a Program or
Erase; a change in its value after the operation has
started does not have any effect and Program or
Erase operations continue.
If V
supply pin. In this condition V
until the Program/Erase algorithm is completed.
V
ence for all voltage measurements in the Flash
(core and I/O Buffers) and PSRAM chips.
Note: Each Flash memory device in a system
should have their supply voltage (V
the program supply voltage V
with a 0.1µF ceramic capacitor close to the pin
(high frequency, inherently low inductance ca-
pacitors should be as close as possible to the
package). See
Load
sufficient to carry the required V
and erase currents.
PPF
PPF
SS
PPF
PPF
Ground. V
is seen as a control input. In this case a volt-
Program Supply Voltage. V
Circuit. The PCB track widths should be
is kept in a low voltage range (0V to V
is in the range of V
M36L0R7040T0, M36L0R7040B0
SS
PPLKF
Figure 6., AC Measurement
is the common ground refer-
gives an absolute protec-
PPHF
PPF
it acts as a power
PPF
must be stable
PPF
PPF
6
PPF
decoupled
and 7, DC
DDF
is both a
program
> V
PPF
) and
DDQ
PP1F
7/18
is
)