HI-3588 HOLTIC [Holt Integrated Circuits], HI-3588 Datasheet

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... July 2009 GENERAL DESCRIPTION The HI-3588 from Holt Integrated Circuits is a silicon gate CMOS device for interfacing a Serial Peripheral Interface (SPI) enabled microcontroller to an ARINC 429 serial bus. The device provides one receiver with user-programmable label recognition for any combination of 256 possible labels Receive FIFO and an analog line receiver ...

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... Goes high when ARINC 429 receiver FIFO is empty (CR15=0), or full (CR15=1) VDD POWER 3.3V or 5.0V logic power RINA-40 INPUT Alternate ARINC receiver positive input. Requires external 40K ohm resistor RINA INPUT ARINC receiver positive input. Direct connection to ARINC 429 bus HI-3588 VDD ARINC Clock Divider Status Register Label Filter Bit Map Memory ...

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... None No instruction implemented 0E No instruction implemented 0F None Write the Control Register 10 16 bits HI-3588 Table 1 lists all instructions. Instructions that perform a reset or set are executed after the last SI bit is received while Example: CS SCK SI TABLE 1. DEFINED INSTRUCTION OP CODES DESCRIPTION , reset all label selections ...

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... Not used ARINC 429 DATA FORMAT Not used Control Register bit CR11 controls how individual bits in the received ARINC word are mapped to the HI-3588 SPI data word bits during data read or write operations. The following table describes this mapping: Not used ...

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... RINB-40 GND FIGURE 1. ARINC RECEIVER INPUT The HI-3588 guarantees recognition of these levels with a common mode voltage with respect to GND less than ±30V for the worst case condition (3.15V supply and 13V signal level). Design tolerances guarantee detection of the above levels, so the actual acceptance ranges are slightly larger ...

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... The contents of the Label Look-up table may be read via the SPI interface using instruction 0D hex as described in Table 1. LINE RECEIVER INPUT PINS The HI-3588 has two sets of Line Receiver input pins, RINA/B and RINA/B-40. Only one pair may be used to connect to the ARINC 429 bus. The unused pair must be left floating. The RINA/B pins may be connected directly to the ARINC 429 bus ...

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... SO Hi Impedance TXAOUT ARINC BIT TXBOUT DATA NULL BIT 30 BIT 31 ARINC DATA BIT 32 RFLAG t RFLG CS SPI INSTRUCTION 08h, (or 09h HI-3588 SERIAL INPUT TIMING DIAGRAM t CYC t CES t t SCKR DH MSB SERIAL OUTPUT TIMING DIAGRAM t CYC t DV MSB DATA RATE - EXAMPLE PATTERN ...

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... Logic "0" Output Voltage Output Current: (All Outputs & Bi-directional Pins) Output Capacitance: Operating Voltage Range Operating Supply Current VDD HI-3588 Power Dissipation at 25°C Plastic Quad Flat Pack ..................1.5 W, derate 10mW Current Drain per pin .............................................. ±10mA Storage Temperature Range ........................ -65°C to +150°C +0.3V DD Operating Temperature Range (Industrial): .... -40° ...

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... The HI-3588PCI and HI-3588PCT use a 44-pin plastic chip-scale package. This package has a metal heat sink pad on its bottom surface that is electrically connected to the die. For the HI-3588, the primary advantage of this package is its small size; heat sinking provides little benefit ORDERING INFORMATION ...

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... REVISION HISTORY Revision Date Description of Change DS3588, Rev. NEW 05/08/08 Initial Release Rev. A 10/10/08 Revised AC Electrical Characteristics Rev. B 05/22/09 Clarified relationship between SPI bit order and ARINC 429 bit order Rev. C 07/02/09 Removed references to V+, V-, which are not connected on this device HI-3588 HOLT INTEGRATED CIRCUITS 10 ...

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... SQ. See Detail A .063 MAX. (1.6) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-3588 PACKAGE DIMENSIONS .203 ± .006 (5.15 ± .15) Heat sink pad on bottom of package. .008 Heat sink must be left floating or typ (0.2) connected to VDD. ...