PC87200VUL160A NSC [National Semiconductor], PC87200VUL160A Datasheet - Page 24
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PC87200VUL160A
Manufacturer Part Number
PC87200VUL160A
Description
PC87200 PCI to ISA Bridge
Manufacturer
NSC [National Semiconductor]
Datasheet
1.PC87200VUL160A.pdf
(33 pages)
- Current page: 24 of 33
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8.0 Electrical Characteristics
8.2.2 NAND Tree Connections
During NAND tree testing, all outputs and bi-directional
pins will be tri-stated except BALE and RSTDRV pins. The
first input of the NAND chain is SA18. The NAND chain is
routed counter-clockwise around the chip (eg. SA18,
SA19, IRQ9, ...). TC is the intermediate output and RST-
test_in
irq7
SBHEX
BPDX
SA17
SA18
SA19
SA16
(Continued)
nand_test_en
NAND Tree Diagram
24
DRV is the final output. BALE, PCIRSTX and IRQ7 are not
included in the NAND chain because they are required to
put the chip to NAND test mode. The NAND tree connec-
tion is as shown below.
xdma_tc
~pad_pcirstx_in
nand_test_en
nand_test_en
0
1
0
1
www.national.com
TC
RSTDRV
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