TP2502N8 Supertex, TP2502N8 Datasheet
TP2502N8
Manufacturer Part Number
TP2502N8
Description
Manufacturer
Supertex
Specifications of TP2502N8
Case
SOT-89
Date_code
07+
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-G indicates package is RoHS compliant (‘Green’)
* MIL visual screening available.
Absolute Maximum Ratings
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
* Distance of 1.6 mm from case for 10 seconds.
Ordering Information
Parameter
Drain-to-source voltage
Drain-to-gate voltage
Gate-to-source voltage
Operating and storage temperature
Soldering temperature*
TP2502
Device
Low threshold (-2.4V max.)
High input impedance
Low input capacitance (125pF max.)
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Logic level interfaces - ideal for TTL and CMOS
Solid state relays
Battery operated systems
Photo voltaic drives
Analog switches
General purpose line drivers
Telecom switches
TO-243AA (SOT-89)
TP2502N8-G
Package Options
P-Channel Enhancement Mode
Vertical DMOS FETs
TP2502ND
-55°C to +150°C
Die*
300°C
Value
BV
BV
±20V
DGS
DSS
General Description
This low threshold enhancement-mode (normally-off) tran-
sistor utilizes a vertical DMOS structure and Supertex’s well-
proven silicon-gate manufacturing process. This combination
produces a device with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coeffi cient inherent in MOS devices. Characteristic
of all MOS structures, this device is free from thermal runaway
and thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide
range of switching and amplifying applications where very
low threshold voltage, high breakdown voltage, high input
impedance, low input capacitance, and fast switching speeds
are desired.
BV
DSS
Pin Confi guration
Product Marking
-20
(V)
/BV
DGS
TP5LW
TO-243AA (SOT-89) (N8)
TO-243AA (SOT-89) (N8)
R
DRAIN
2.0
DS(ON)
(Ω)
W = Code for week sealed
GATE
= “Green” Packaging
DRAIN
V
(max)
-2.4
GS(TH)
(V)
SOURCE
TP2502
I
(min)
-2.0
D(ON)
(A)
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