CY7C1019CV33-12BVXI Cypress Semiconductor Corporation., CY7C1019CV33-12BVXI Datasheet

CY7C1019CV33-12BVXI

Manufacturer Part Number

CY7C1019CV33-12BVXI

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheets

1.CY7C1019CV33-12BVXI.pdf (10 pages)

2.CY7C1019CV33-12BVXI.pdf (9 pages)

Specifications of CY7C1019CV33-12BVXI

Case

BGA

Date_code

0607+

Current page: 1 of 10
Download datasheet (383Kb)

Cypress Semiconductor Corporation

Document #: 38-05130 Rev. *F

Features

Functional Description

The CY7C1019CV33 is a high-performance CMOS static

RAM organized as 131,072 words by 8 bits. Easy memory

expansion is provided by an active LOW Chip Enable (CE), an

active LOW Output Enable (OE), and tri-state drivers. This

• Pin and function compatible with CY7C1019BV33

• High speed

• CMOS for optimum speed/power

• Data retention at 2.0V

• Center power/ground pinout

• Automatic power-down when deselected

• Easy memory expansion with CE and OE options

• Available in Pb-free and non Pb-free 48-ball VFBGA,

Logic Block Diagram

— t

32-pin TSOP II and 400-mil SOJ package

= 10 ns

INPUT BUFFER

128K x 8

DECODER

COLUMN

ARRAY

POWER

DOWN

•

198 Champion Court

device has an automatic power-down feature that significantly

reduces power consumption when deselected.

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. Data on the eight I/O

pins (I/O

specified on the address pins (A

Reading from the device is accomplished by taking Chip

Enable (CE) and Output Enable (OE) LOW while forcing Write

Enable (WE) HIGH. Under these conditions, the contents of

the memory location specified by the address pins will appear

on the I/O pins.

The eight input/output pins (I/O

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), or during a write

operation (CE LOW, and WE LOW).

The CY7C1019CV33 is available in Standard 48-ball FBGA,

32-pin TSOP II and 400-mil-wide SOJ packages

I/O

•

San Jose

through I/O

I/O

128K x 8 Static RAM

Pin Configuration

CA 95134-1709

) is then written into the location

SOJ/TSOP II

Top View

through I/O

Revised August 3, 2006

through A

CY7C1019CV33

•

I/O

) are placed in a

408-943-2600

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