CBT16212DL,518 NXP Semiconductors, CBT16212DL,518 Datasheet
CBT16212DL,518
Specifications of CBT16212DL,518
CBT16212DL-T
CBT16212DL-T
Related parts for CBT16212DL,518
CBT16212DL,518 Summary of contents
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CBT16212 24-bit bus exchange switch with 12-bit output enables Rev. 02 — 3 November 2008 1. General description The CBT16212 provides 24 bits of high-speed TTL-compatible bus switching or exchanging. The low ON resistance of the switch allows connections to ...
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... NXP Semiconductors 4. Functional diagram 1A1 2 1A2 3 2A1 4 2A2 5 3A1 6 3A2 7 4A1 9 4A2 10 5A1 11 5A2 12 6A1 13 6A2 14 7A1 15 7A2 16 8A1 18 8A2 20 9A1 21 9A2 22 10A1 23 10A2 24 11A1 25 11A2 26 12A1 27 12A2 Fig 1. Functional diagram CBT16212_2 Product data sheet 24-bit bus exchange switch with 12-bit output enables ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. Pin configuration SOT364-1 (TSSOP56) and SOT371-1 (SSOP56) 5.2 Pin description Table 2. Pin description Symbol Pin S0, S1 56, 55 1A1 to 12A1 11, 13, 15, 18, 21, 23, 25, 27 1A2 to 12A2 10, 12, 14, 16, 20, 22, 24, 26, 28 GND 8, 19, 38 1B1 to 12B1 ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function selection Port select input [ HIGH voltage level LOW voltage level high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V input voltage I I input clamping current ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics +85 C. amb Symbol Parameter V input clamping voltage IK I input leakage current I I supply current CC I additional supply current CC C input capacitance I C off-state input/output capacitance V io(off resistance ON [1] All typical values are measured at T [2] This is the increase in supply current for each input that is at the specifi ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in V and V are typical output voltage levels that occur with the output load Fig 4. Input to output propagation delays Measurement points are given in V and V are typical output voltage levels that occur with the output load. ...
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... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 6. Test circuit Table 9. Test data Supply voltage ...
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... NXP Semiconductors 12. Package outline TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6 pin 1 index 1 DIMENSIONS (mm are the original dimensions). A UNIT max. 0.15 1.05 mm 1.2 0.25 0.05 0.85 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors SSOP56: plastic shrink small outline package; 56 leads; body width 7 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.4 2.35 mm 2.8 0.25 0.2 2.20 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION IEC SOT371-1 Fig 8 ...
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... CBT16212_2 03112008 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 7 “Dynamic – Enable time: min value changed from 3.6 into 2.4. ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 14 Revision history ...