MSM6222B-xx OKI, MSM6222B-xx Datasheet - Page 32

• Manufacturer Part Number: MSM6222B-xx
• Description: DOT MATRIX LCD CONTROLLER WITH 16 DOT COMMON DRIVER AND 40 DOT SEGMENT DRTVER
• Manufacturer: OKI

¡ Semiconductor
(10) Busy flag and address counter read (Execution time is 1 ms.)
(11) DD RAM and CG RAM data read
The busy flag (BF) is output by this instruction to indicate whether the MSM6222B-xx
is engaged in internal operations (BF = "H") or not (BF = "L").
When BF = "H", no new instruction is accepted. It is therefore necessary to verify BF =
"L" before inputting a new instruction.
When BF = "L", a correct address counter value is output. The address counter value
must match the DD RAM address or CG RAM address. The decision of whether it is
a DD RAM address or CG RAM address is made by the address previously set.
Since the address counter value when BF = "H" is sometimes incremented or decremented
by 1 during internal operations, it is not always a correct value.
to P
1 as set by the shift mode mentioned in item "(3) shift mode set".
(Note) Conditions for the reading of correct data:
Character codes (bits P
Selection of DD RAM or CG RAM is decided by the address previously set.
After reading those data, the address counter (ADC) is incremented or decremented by
The execution time, when the OSC oscillation frequency is 250 kHz, is 40 ms.
Instruction code
Instruction code
0
) from the CG RAM.
1 When the DD RAM address set or CG RAM address set is input before
2 When the cursor/display shift is input before inputting this instruction in
3 Data after the second reading from RAM when read more than 2 times.
inputting this instruction.
case the character code is read.
Correct data is not output in any other case.
R/W
R/W
H
H
RS
RS
H
L
7
to P
DB
DB
BF
P
7
0
7
7
) are read from the DD RAM, while character patterns (P
DB
DB
O
P
6
6
6
6
DB
DB
O
P
5
5
5
5
DB
DB
O
P
4
4
4
4
DB
DB
O
P
3
3
3
3
DB
DB
O
P
2
2
2
2
DB
DB
O
P
1
1
1
1
DB
DB
O
P
0
0
0
0
MSM6222B-xx
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