MSM6222B-xx OKI, MSM6222B-xx Datasheet - Page 14

• Manufacturer Part Number: MSM6222B-xx
• Description: DOT MATRIX LCD CONTROLLER WITH 16 DOT COMMON DRIVER AND 40 DOT SEGMENT DRTVER
• Manufacturer: OKI

¡ Semiconductor
Timing Generator Circuit
Display Data RAM (DD RAM)
This circuit is used to generate timing signals to activate internal operations upon receipt
of CPU instruction and also from such internal circuits as the DD RAM, CG RAM, and CG
ROM.
It is designed so that the internal operation caused by accessing from the CPU will not
interfere with the internal operation caused by LCD driving. Consequently, when data is
written from the CPU to DD RAM, flickering does not occur in a display area other than
the display area where the data is written.
In addition, this circuit generates the transfer signal to MSM5259 for display character
expansion.
This RAM is used to store display data of 8-bit character codes (see Table 2).
DD RAM address corresponds to the display position of the LCD. The correspondence
between the two is described in the following.
DD RAM address (set to ADC) is expressed in hexadecimal notation as shown below:
(1) Correspondence between address and display position in the 1-line display mode
• When the MSM6222B-xx alone is used, up to 8 characters can be displayed from the
first to eighth digit.
When the display is shifted by instruction, the correspondence between the LCD
display position and the DD RAM address changes as shown below:
(Display
shifted
to right)
(Display
shifted
to left)
MSB
First
digit
(Example)
When DD RAM
address is 2A
First
digit
00
00
01
01
2
2
ADC
02
02
First
digit
First
digit
3
3
4F
01
03
03
4
4
00
02
MSB
2
2
DB
Hexadecimal notation
L
6
04
04
5
5
01
03
3
3
05
H
6
2
02
04
4
4
06
7
03
05
5
5
L
07
8
04
06
6
6
H
79
4E
05
07
7
7
Hexadecimal notation
LSB
80
4F
06
08
8
8
L
A
Display position
DD RAM address (hex.)
H
LSB
DB
L
0
MSM6222B-xx
14/45