L-FW323-06-DB AGERE [Agere Systems], L-FW323-06-DB Datasheet - Page 19

• Manufacturer Part Number: L-FW323-06-DB
• Description: PCI PHY/Link Open Host Controller Interface
• Manufacturer: AGERE [Agere Systems]

Data Sheet, Rev. 1
December 2005
Pin Information
Table 1. Pin Descriptions (continued)
* Active-low signals within this document are indicated by an N following the symbol names.
Agere Systems Inc.
100
101
102
103
104
105
106
Pin
94
95
96
97
98
99
TPBIAS2
Symbol*
TPB2–
TPB2+
TPB1–
TPB1+
TPA2+
TPA2–
V
V
V
V
V
CPS
DDA
DDA
SSA
SSA
SSA
(continued)
Analog I/O
Analog I/O
Analog I/O
Analog I/O
Type
—
—
—
—
—
I
Cable Power Status. CPS is normally connected to the cable
power through a 400 kΩ resistor. This circuit drives an internal
comparator that detects the presence of cable power. This informa-
tion is maintained in one internal register and is available to the
LLC by way of a register read (see IEEE 1394a-2000, Standard for
a High Performance Serial Bus, Sections 4.2.2.7 and 5B.1).
Note: This pin can be left unconnected for applications that do not
Analog Circuit Ground. All V
a low-impedance ground plane.
Analog Circuit Power. V
of the device.
Port 2, Port Cable Pair B. TPB2± is the port B connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
Port 2, Port Cable Pair A. TPA2± is the port A connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
Port 2, Twisted-Pair Bias. TPBIAS2 provides the 1.86 V nominal
bias voltage needed for proper operation of the twisted-pair cable
drivers and receivers and for sending a valid cable connection signal
to the remote nodes. When the FW323’s 1394 port pins are not
wired to a connector, the unused port pins may be left unconnected.
Internal connect-detect circuitry will keep the port in a disconnected
state.
Analog Circuit Ground. All V
a low-impedance ground plane.
Analog Circuit Ground. All V
a low-impedance ground plane.
Analog Circuit Power. V
the device.
Port 1, Port Cable Pair B. TPB1± is the port B connection to the
twisted-pair cable. Board traces from each pair of positive and nega-
tive differential signal pins should be kept matched and as short as
possible to the external load resistors and to the cable connector.
When the FW323’s 1394 port pins are not wired to a connector, the
unused port pins may be left unconnected. Internal connect-detect
circuitry will keep the port in a disconnected state.
use 1394 bus power (VP). When this pin is grounded, the
PWR_FAIL bit in PHY register 0101
PCI PHY/Link Open Host Controller Interface
DDA
DDA
Description
supplies power to the analog portion of
SSA
SSA
SSA
supplies power to the analog portion
signals should be tied together to
signals should be tied together to
signals should be tied together to
2
will set.
FW323 06 1394a
19