SY89840UMG Micrel Inc, SY89840UMG Datasheet - Page 9

• Manufacturer Part Number: SY89840UMG
• Description: IC MUX 2:1 LVPECL DIFF 16MLF
• Manufacturer: Micrel Inc
• Series: SY89r
• Type: Multiplexerr

Specifications of SY89840UMG

• Circuit: 1 x 2:1
• Independent Circuits: 1
• Voltage Supply Source: Single Supply
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-MLF®, QFN
• Number Of Clock Inputs: 2
• Mode Of Operation: Differential
• Output Logic Level: LVPECL
• Operating Supply Voltage (min): 2.375V
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Package Type: MLF
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Signal Type: CML/LVDS/PECL
• Mounting: Surface Mount
• Pin Count: 16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Output High, Low: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 576-1434

February 2005
Case #2 Input Clock Failure: Switching from a
selected clock stuck HIGH to a valid clock (RPE
enabled).
If CLK1 fails HIGH before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in three stages.
Case #3 Input Clock Failure: Switching from a
selected clock stuck Low to a valid clock (RPE
enabled).
If CLK1 fails LOW before the RPE MUX selects
CLK2 (using the SEL pin), the switchover will occur
in two stages.
Note:
Output shows extended clock cycle during switchover. Pulse width for both high and low of this cycle will always be greater than 50% of
the CLK2 period.
Timing Diagram 2
Timing Diagram 3
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Stage 1: The output will remain HIGH for a limited
number of pulses of CLK2.
Stage 2: The output will switch to LOW and then
remain LOW for a limited number of falling edges of
CLK2.
Stage 3: The output will follow CLK2
Stage 1: The output will remain LOW for a limited
number of falling edges of CLK2.
Stage 2: The output will follow CLK2.
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