S3C70F2 Samsung semiconductor, S3C70F2 Datasheet - Page 29

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S3C70F2

Manufacturer Part Number
S3C70F2
Description
The S3C70F2/C70F4 single-chip CMOS microcontroller has been designed for high-performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrange
Manufacturer
Samsung semiconductor
Datasheet
S3C70F2/C70F4/P70F4
NOTE: ( ) means the 32-SOP OTP pin number.
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the V
operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 16–3 below.
NOTE: "0" means Low level; "1" means High level.
Program Memory
Operating Voltage (V
OTP Programming Mode
Pin Configuration
EPROM Programmability
Main Chip
Pin Name
V
V
5 V
RESET
DD
DD
TEST
P6.2
P6.3
/ V
Characteristic
SS
V
pp
12.5 V
12.5 V
12.5 V
(TEST)
5 V
V
Pin Name
V
Table 16-2. Comparison of S3P70F4 and S3C70F2/C70F4 Features
PP
RESET
DD
DD
Table 16-1. Descriptions of Pins Used to Read/Write the EPROM
SDAT
SCLK
(TEST)
)
/ V
REG/MEM
SS
Table 16-3. Operating Mode Selection Criteria
0
0
0
1
PP
4 K-byte EPROM
2.0 V to 5.5 V
V
30 SDIP, 32 SOP
User Program one time
DD
(TEST) pin of the S3P70F4, the EPROM programming mode is entered. The
30/1 (32/1)
= 5 V, V
Pin No.
28 (30)
29 (31)
4 (4)
7 (7)
ADDRESS(A15-A0)
PP
S3P70F4
(TEST)=12.5V
0E3FH
0000H
0000H
0000H
During Programming
I/O
I/O
I/O
I
I
I
Serial data pin. Output port when reading and input
port when writing. Can be assigned as a Input /
push-pull output port.
Serial clock pin. Input only pin.
Power supply pin for EPROM cell writing (indicates
that OTP enters into the writing mode). When 12.5
V is applied, OTP is in writing mode and when 5 V
is applied, OTP is in reading mode. (Option)
Chip initialization
Logic power supply pin. V
during programming.
R/W
1
0
1
0
2 K-byte mask ROM: S3C70F2
4 K-byte mask ROM: S3C70F4
1.8 V to 5.5V
30 SDIP, 32 SOP
Programmed at the factory
Function
EPROM read protection
S3C70F2/C70F4
EPROM program
DD
EPROM verify
EPROM read
should be tied to +5 V
MODE
S3P70F4 OTP
16-3

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