AM79C930VC/W AMD [Advanced Micro Devices], AM79C930VC/W Datasheet - Page 143
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AM79C930VC/W
Manufacturer Part Number
AM79C930VC/W
Description
PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C930VCW.pdf
(161 pages)
- Current page: 143 of 161
- Download datasheet (678Kb)
Notes:
1. Only applicable when TXC has been configured as an INPUT.
2. Only applicable when TXC has been configured as an OUTPUT.
3. MIN value not tested.
4. Parameter calculated from other parameters.
5. Clock period must correlate to data rate as specified in DR bits of TCR30. Note that data rate is a function of DR and T CLKIN and
6. The values for these parameters are given for the case with CLKP = 0 (TCR2[4:0]). For nonzero values of CLKP, use the
7. Values given are for data rate of 2Mb/s. For other data rates,
8. Parameter not included in the production test.
CLKGT20 bit of MIR9.
following formulas:
If CLKGT20 = 0 (MIR9[7]),
If CLKGT20 = 1 (MIR9[7]),
T TXC is 1/DR, where DR = data rate in Hertz,
T CLTX is 60% of T TXC minus T TXHL ,
T CHTX is 40% of T TXC minus T TXHL ,
T TXCO is 1/DR, where DR = data rate in Hertz,
T CLTXO is 60% of T TXCO minus T TXHLO ,
T CHTXO is 40% of T TXCO minus T TXHLO ,
T TXHLO is 15 ns, regardless of DR value,
T TXLHO is 15 ns, regardless of DR value.
t RXDH min = 10+CLKP X T CLKIN
t RXDH min = 10+CLKP X T CLKIN X 2
t RXDS min = 110–CLKP X T CLKIN
t RXDS min = 110–CLKP X T CLKIN X 2
P R E L I M I N A R Y
Am79C930
AMD
143
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