AM79C03 AMD [Advanced Micro Devices], AM79C03 Datasheet - Page 43

• Manufacturer Part Number: AM79C03
• Description: Dual Subscriber Line Audio Processing Circuit (DSLAC) Devices
• Manufacturer: AMD [Advanced Micro Devices]

In the continuous Adaptation mode, the algorithm is
switched on (via MPI Command 19) after a call is con-
nected and remains on until the call ends. In this way,
the B filter is continually being optimized to the re-
ceived signal.
In the Adapt and Freeze modes, the algorithm is used
only when a line is brought into service and the DSLAC
device is activated. The algorithm is switched on and is
allowed to converge with the received signal, which is
a bandlimited white noise signal generated in the ex-
change for this purpose. The noise signal need only be
injected for less than a second to yield converged coef-
ficients. The Adaptive mode then is switched off (via
Command 19).
The converged coefficients may be read out of the
DSLAC device (using MPI Command 31) and stored for
future reference. The DSLAC device is now optimized
for general input signals.
Adaptive Filter Programming
The purpose of the B filter is to cancel the received
signal that leaks across the hybrid into the transmit path.
The B filter transfer function must match (as closely as
possible) the transfer function of the echo path.
There are two programmable registers associated with
the adaptive B filtering. The Echo Path Gain (EPG) is a
programmable value that predicts the amount of the
receive signal leaking across the hybrid to the transmit
path. The EPG is used as part of an algorithm, which
SLAC Products
stops the adaptive filter from iterating in the presence
of signals from the subscriber line (nearend talker).
The Error Level Threshold (ELT) is a programmable val-
ue that determines the transhybrid loss the adaptive
filter attempts to meet. The adaptive algorithm contin-
ues to iterate until it meets the loss requirement speci-
fied by the ELT. Both the EPG and ELT values are
generated by the WinSLAC™ software program (for-
merly AmSLAC2™ software). Please refer to the soft-
ware technical documentation.
User Test Modes
The DSLAC device supports testing by providing both
digital and analog loopback paths as shown in Figure 8.
In the TSA Loopback mode, the DR input is connected
to the DX output in the Time Slot Assigner circuitry. The
TSA Loopback mode is programmed via Command 21.
A different type of digital loopback is provided when the
AISN register is programmed with a value of 10000. In
this case, the AISN circuitry is disabled and the VOUT
pad is connected internally to VIN. This allows the D/A
and A/D converters to be included in the digital loopback
test. This mode is programmed via Command 13. Note
that the signal, which is connected internally from VOUT
to VIN, also is present on the VOUT pin.
The VIN input can be connected to the VOUT output
through the Z filter for analog loopback. The response
of the line to low frequencies can be tested by disabling
the high-pass filter. Additionally, the receive and trans-
mit paths may be cut off.
43