ZL50012/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50012/GDC Datasheet - Page 25
ZL50012/GDC
Manufacturer Part Number
ZL50012/GDC
Description
Flexible 512-ch Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50012GDC.pdf
(65 pages)
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When the input channel delay and the output channel delay are enabled, the data throughput delay is: T = 3 frames
- α + β + (m-n). Figure 24 shows the data throughput delay when the input Ch0 is switched to the output Ch0.
Figure 24 - Data Throughput Delay when input and output channel delay are enabled for Input
Serial Output Data
Serial Output Data
Serial Input Data
Serial Input Data
Frame
(α = 1)
(α > 1)
(β = 1)
(β > 1)
Frame N-1 Data
Frame N-3 Data
Frame N
Frame N Data
Frame N-4 Data
3 Frames - 1 + β + 0
Input Channel Delay:(from 1 to max# of channels, programmed by the STIN#CD6-0 bit)
Frame N+1 Data
Frame N Data
Frame N-2 Data
Frame N+1
3 Frames - 1 + 1 + 0
Frame N-3 Data
Ch0 switched to Output Ch0
Zarlink Semiconductor Inc.
ZL50012
3 Frames - α + 1 + 0
Frame N+1 Data
Frame N+2 Data
Frame N-1 Data
Frame N+2
Frame N-2 Data
28
Frame N+2 Data
Frame N+3 Data
Frame N+3
Output Channel Delay:(from 1 to max# of channels,
programmed by the STO#CD6-0 bit)
Frame N-1 Data
Frame N Data
3 Frames - α + β + 0
Frame N+3 Data
Frame N+4 Data
Frame N+1 Data
Frame N+4
Frame N Data
Frame N+4 Data
Frame N+4 Data
Frame N+5 Data
Frame N+2 Data
Frame N+5
Frame N+1 Data
Data Sheet
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