AK4685 AKM [Asahi Kasei Microsystems], AK4685 Datasheet - Page 37

• Manufacturer Part Number: AK4685
• Description: Multi-channel CODEC with Differential Analog I/O
• Manufacturer: AKM [Asahi Kasei Microsystems]

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When RSTN bit = “0”, the ADC and DAC digital blocks are powered-down but the internal register are not initialized.
The analog outputs (LOUT+/-, ROUT+/- pins) go to VCOM voltage, the headphone outputs (HPL/R pins) go to ground
level (VSS5) and the SDTOB1/2 pins go to “L”. As some click noise occur, the analog outputs should be muted externally
if the click noise influences a system application. The
Notes:
MS1106-E-00
Reset Function
(1) The analog block of ADC is initialized after exiting the reset state.
(2) The digital outputs corresponding to the analog inputs, and the analog outputs corresponding to the digital inputs
(3) ADC output is “0” data at power-down state.
(4) Click noise occurs when the internal RSTN bit becomes “1”. Mute the digital outputs externally if the click noise
(5) When RSTN bit = “0”, the analog outputs go to 0V.
(6) A click noise occurs at 4∼5/fs after RSTN bit became “0”, and occurs at 1∼2/fs after RSTN bit becomes “1”.
(7) There is a delay about 4~5/fs from a writing “0” to the RSTN bit until the internal RSTN bit changes to “0”.
have group delay (GD).
influences a system application.
DAC Internal
DAC In
DAC Out
ADC Internal
ADC In
ADC Out
RSTN bit
Internal
RSTN bit
(Digital)
(Analog)
(Analog)
(Digital)
State
State
Normal Operation
Normal Operation
GD
Figure 18. Reset Sequence Example
GD
(2)
(2)
Digital Block Power-down
Digital Block Power-down
(6)
4~5/fs (7)
“0”data
“0”data
(5)
Figure 18
- 37 -
(3)
(6)
shows the power-up sequence.
1~2/fs
Init Cycle
516/fs
(1)
Normal Operation
(4)
Normal Operation
GD
GD
[AK4685]
2009/08