AK4685 AKM [Asahi Kasei Microsystems], AK4685 Datasheet - Page 31

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AK4685

Manufacturer Part Number
AK4685
Description
Multi-channel CODEC with Differential Analog I/O
Manufacturer
AKM [Asahi Kasei Microsystems]
Datasheet
When the MT1N pin is set to “L” from “H”, a digital to analog data converting is stropped and the analog outputs
(LOUT+/-, ROUT+/- pins) are attenuated in soft transition. The analog block becomes power-down mode after the soft
transition is completed, and VCOM is output from the analog outputs. Transition time is controlled by AMT2-0 bits.
When the MT1N pin is set to “H” from “L”, the analog block returns to normal operation and a digital to analog
converting is resumed. After DAC initializing time, the mute is cancelled and the output attenuation gradually changes to
the ATT level during ATT_DATA x ATT transition time.
(1) “L” time of 20ms or more is needed.
(2) The soft mute transition time by analog processing is depending on the AMT2-0 bits setting. A crick noise occurs
(3) ATT_DATA x ATT transition time
When the MT2N pin is set to “L” from “H”, the headphone output is attenuated in soft transition. The analog and
headphone blocks become power-down mode after the soft transition is completed, and ground level (VSS5) is output
from these outputs. Transition time is controlled by AMT2-0 bits. The data inputs and DAC clocks must not be stopped
before the soft transition complete.
When the MT2N pin is set to “H” from “L”, the analog and headphone blocks return to normal operation and a digital to
analog converting is resumed. After DAC initializing time, the mute is cancelled and the output attenuation gradually
changes to the ATT level during ATT_DATA x ATT transition time.
MS1106-E-00
Analog Mute
when each power supply (TVDD, DVDD1/2/3, AVDD1/2/3 and PVDD) is off during mute transition time. Power
supplies should be provided longer than the transition time set by AMTS2-0 bits set.
ATT value from FFH(0dB) to 00H(MUTE) is 1061/fs.
DACl Internal State
Digital Attenuation
Power
MT1N pin
DACL+/-, DACR+/-
ATT Level
Figure 14. Mute Sequence Example (MT1N pin)
-∞
(Table
16). In case of MODE0 and ATS2-0 bits =“00H”, the transition time of
(2)
- 31 -
(Table
(1)
16)
(Table
Init Cycle
512/fs
16)
Normal Operation
(3)
GD
[AK4685]
2009/08

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