EPXA4 ALTERA [Altera Corporation], EPXA4 Datasheet - Page 30

• Manufacturer Part Number: EPXA4
• Description: Excalibur Devices
• Manufacturer: ALTERA [Altera Corporation]

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If the above conditions are met then the debug entry mechanism fails to
behave in the defined manner and the device may return from debug and
execute from an incorrect address.
Implications
For each scenario the following implications are expected given the above
conditions:
Busy-waiting Coprocessor Instructions
In this form the debug request supersedes the currently executing
coprocessor instruction, which would normally not occur. As such the PC
is not the correct value as debug entry proceeds. Correspondingly, on
return from debug the standard return address calculation produces an
incorrect address and thus unintended or unpredictable device behaviour
may result.
Data Aborts
In this form the debug request causes correct debug entry and exit.
However, the link register address calculation for the return from the Data
Abort handler is incorrect. Correspondingly, on return from the Data
Abort handler unintended or unpredictable device behaviour may result.
Watchpoints
In this form the debug request causes debug entry first, but the
watchpoint is still pending and has yet to execute the next instruction
before it takes full effect. As debug entry has already occurred this next
instruction will be the first instruction within debug mode to be executed.
After this instruction executes, debug entry occurs for a second time, even
though the device is already in debug, and results in the premature exiting
of debug. Consequently, the return from debug is to an incorrect address
and thus unintended or unpredictable device behaviour may result.
Recognition of a watchpoint is said to be in progress if the last
memory access caused a watchpoint, but debug entry has not yet
completed.
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