EPXA4 ALTERA [Altera Corporation], EPXA4 Datasheet - Page 10

• Manufacturer Part Number: EPXA4
• Description: Excalibur Devices
• Manufacturer: ALTERA [Altera Corporation]

Notes:
(a)
(b)
10
1004
1008
Address
Table 2. Example of invalid data trace following overflow during wait-state period
Corresponds to data transferred by the core
Data from a future instruction
LDMIA r6, {r0 – r4} [r6]
LDR r7, [r8]
Instruction
[r6+1]
[r6+2]
[r6+3]
[r6+4]
[r8]
ETM FIFO
Data trace
Note that, in this example, all the data transfers were reported either
before or after the overflow. However, this may not necessarily be the
case, and some transfers before the overflow, and the instruction itself,
may not be reported,
entering
a
1004 with data
Overflow
1004 with data
1008 with data
flow reported
Instruction
by ETM
r0 <= [r6]
r1 <= [r6+1]
r2 <= [r6+2]
r0 <= [r6+3]
r1 <= [r6+4]
r2 <= [r8]
r3 <= invalid data
r4 <= invalid data
r7 <= invalid data
reported by ETM
Data transfer
b
b
b
b
ETM begins to log the data transferred
from the contents of r6 to each registers
in the list in turn, with r6 post-
incremented each time.
Wait-state begins, stalling data
transfers.
Overflow occurs (due to data trace
continuing to enter the FIFO from the
ETM’s internal pipeline) causing tracing
to be suspended
FIFO drains and overflow clears
Wait-state ends and data transfers
resume
The instruction is reported once more by
ETM as trace restarts, data trace
resumes and now incorrect data values
are reported.
The required operation was that no data
should enter the FIFO at this point, as
there is no way to indicate which
transfers were traced.
The ETM now also reports an incorrect
data value for register r7
The required operation was that the next
operation after overflow would receive
correct data trace. So, in this example:
r7 <= [r8]
Notes
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