CYIL1SM0300AA_09 CYPRESS [Cypress Semiconductor], CYIL1SM0300AA_09 Datasheet - Page 23

• Manufacturer Part Number: CYIL1SM0300AA_09
• Description: LUPA-300 CMOS Image Sensor
• Manufacturer: CYPRESS [Cypress Semiconductor]

Pinlist
Table 15. Pinlist
Document Number: 001-00371 Rev. *F
Pin No.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
2
3
4
5
6
7
8
9
VRESET_1
PRECHARGE_BIAS
Name
GND
DATA<5>
DATA<6>
DATA<7>
DATA<8>
DATA<9>
GND
V
GND
V
GND
V
ADC_BIAS
BIAS4
BIAS3
BIAS2
BIAS1
VPIX
SPI_ENABLE
SPI_CLK
SPI_DATA
VMEM_H
GND_DRIVERS
VRESET_2
VRESET_3
LINE_VALID
FRAME_VALID
INT_TIME_3
ADC
DDD
DDA
ADC
D
ADC
A
Type
Ground
Output
Output
Output
Output
Output
Ground
Supply
Ground
Supply
Ground
Supply
Biasing
Biasing
Biasing
Biasing
Biasing
Supply
Digital input
Digital input
Digital I/O
Supply
Ground
Supply
Supply
Supply
Bias
Digital output
Digital output
Digital I/O
Biasing of ADCs. Connect with 10 kΩ to VADC and decouple with 100n
Description
Ground supply of the ADCs
Databit<5>
Databit<6>
Databit<7>
Databit<8>
Databit<9> (MSB)
Digital ground supply
Digital power supply (2.5V)
Ground supply of the ADCs
Power supply of the ADCs (2.5V)
Ground supply of analog readout circuitry
Power supply of analog readout circuitry (2.5V)
to GND_ADC
Biasing of amplifier stage. Connect with 110 kΩ to VDDA and decouple
with 100 nF to GNDA
Biasing of columns. Connect with 42 kΩ to VDDA and decouple with 100
nF to GNDA
Biasing of columns. Connect with 1.5 MΩ to VDDA and decouple with
100 nF to GNDA.
Biasing of imager core. Connect with 500 kΩ to VDDA and decouple
with 100 nF to GNDA
Power supply of pixel array (2.5V)
Enable of the SPI
Clock of the SPI. (Max. 20 MHz)
Data line of the SPI. Bidirectional pin
Supply of vmem_high of pixelarray (3.3V)
Ground of pixel array drivers
Reset supply voltage (typical 3.3V)
Dual slope reset supply voltage. Connect to other supply or ground when
dual slope reset is not used
Triple slope reset supply voltage. Connect to other supply or ground
when triple slope reset is not used
Connect with 68 kΩ to VPIX and decouple with 100 nF to
GND_DRIVERS
Indicates when valid data is at the outputs. Active high
Indicates when valid frame is readout
In master mode: Output to indicate the triple slope integration time. In
slave mode: Input to control the triple slope integration time
CYIL1SM0300AA
Page 23 of 31
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