LC74731 Sanyo Semicon Device, LC74731 Datasheet - Page 21

• Manufacturer Part Number: LC74731
• Description: On-Screen Display Controller
• Manufacturer: Sanyo Semicon Device

COMMAND51 (Sync signal detection 2 setup command)
• First byte
• Second byte
Note that all registers are set to 0 when these ICs are reset by the RST pin.
DA0 to 7
DA0 to 7
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register
Register
SJNS3
SJNS2
SJNS1
SJCS1
SJCS0
MUT1
MUT0
RNE0
—
—
—
—
—
—
—
—
State
State
1
1
0
1
0
1
0
1
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
1
Command 5 identification code
Display control settings
Extended command 1 identification code
Second byte identification bit
Sync signal no signal to signal present discrimination - Normal
values
Sync signal no signal to signal present discrimination - Values
shown in parentheses
SJNS3 SJNS2 SJNS1
SJCS1 SJCS0
MUT1 MUT0
0
0
1
0
0
0
0
1
1
1
1
0
0
1
0
1
0
0
0
1
1
0
0
1
1
0
1
0
Output
CSYNC
PE
A0-17 “Z”
0
1
0
1
0
1
0
1
Content
Content
PAL
677 ns (1/3)
903 ns (1/4)
450 ns (1/2)
LC74731W,74732W
Function
Function
Times
None
4
8
16
32
64
128
256
NTSC
558 ns (1/2)
838 ns (1/3)
1117 ns (1/4)
Video signal output muting function selection
Valid when the MUTE pin is low.
Changes the judgment criterion values for sync
signal recognition for the no signal to signal
present transition. (COM50)
Noise ignoring circuit setting for sync signal
recognition for the no signal to signal present
transition
If more than the number of horizontal signals
shown at the left are input during a 1H period, the
circuit recognizes a no signal state.
Synchronization discrimination
Selects the clock used to delimit the HSYNI signal.
Notes
Notes
No. 6526-21/38