AM29PDL129H AMD [Advanced Micro Devices], AM29PDL129H Datasheet

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AM29PDL129H

Manufacturer Part Number
AM29PDL129H
Description
128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Am29PDL129H
Data Sheet
RETIRED
PRODUCT
This product has been retired and is not available for designs. For new and current designs,
S29PL129J supersedes Am29PDL129H and is the factory-recommended migration path. Please refer
to the S29PL129J datasheet for specifications and ordering information. Availability of this document
is retained for reference and historical purposes only.
July 2003
The following document specifies Spansion memory products that are now offered by both Advanced
Micro Devices and Fujitsu. Although the document is marked with the name of the company that
originally developed the specification, these products will be offered to customers of both AMD and
Fujitsu.
Continuity of Specifications
There is no change to this datasheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal datasheet improvement and are noted in the
document revision summary, where supported. Future routine revisions will occur when appro-
priate, and changes will be noted in a revision summary.
Continuity of Ordering Part Numbers
AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order
these products, please use only the Ordering Part Numbers listed in this document.
For More Information
Please contact your local AMD or Fujitsu sales office for additional information about Spansion
memory solutions.
Publication Number 26842
Revision B
Amendment +3
Issue Date November 2, 2005

Related parts for AM29PDL129H

AM29PDL129H Summary of contents

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... Data Sheet This product has been retired and is not available for designs. For new and current designs, S29PL129J supersedes Am29PDL129H and is the factory-recommended migration path. Please refer to the S29PL129J datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only. ...

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... Control and Dual Chip Enable Inputs This product has been retired and is not available for designs. For new and current designs, S29PL129J supersedes Am29PDL129H and is the factory-recom- mended migration path. Please refer to the S29PL129J datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only ...

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... GENERAL DESCRIPTION The Am29PDL129H is a 128 Mbit, 3.0 volt-only Page Mode and Simultaneous Read/Write Flash memory device orga- nized as 8 Mwords. The device is offered in an 80-ball Fine- pitch BGA package, and various multi-chip packages. The word-wide data (x16) appears on DQ15-DQ0. This device can be programmed in-system or in standard EPROM pro- grammers ...

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... Table 4. Am29PDL129H Sector Architecture ..................................12 Table 5. Addresses .......................................................................19 Table 6. Autoselect Codes (High Voltage Method) ........................19 Table 7. Am29PDL129H Boot Sector/Sector Block Addresses for Protection/Unprotection CE1# Control ...................................................................................20 Table 8. Am29PDL129H Boot Sector/Sector Block Addresses for Protection/Unprotection CE2# Control ...................................................................................20 Table 9. Sector Protection Schemes ...............................................21 Write Protect (WP#) ................................................................ 21 Persistent Protection Bit Lock ................................................. 21 High Voltage Sector Protection ...

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... A21–A3 A2–A0 Note:RY/BY open drain output 1.65–1. Sector Switches V Erase Voltage Generator PGM Voltage Generator Chip Enable Output Enable Logic Y-Decoder X-Decoder Am29PDL129H Am29PDL129H DQ15–DQ0 IO Input/Output Buffers Data Latch Y-Gating Cell Matrix ...

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... STATE WE# CONTROL CE1# & CE2# COMMAND REGISTER WP#/ACC DQ0–DQ15 A21–A0 Mux November 2, 2005 CE1#=L CE2#=H Bank 1A Bank 1A Address X-Decoder Bank 1B Address Bank 1B X-Decoder Status Control CE1#=H CE2#=L X-Decoder Bank 2A Bank 2A Address X-Decoder Bank 2B Address Bank 2B Am29PDL129H OE# DQ15–DQ0 Mux 5 ...

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... G4 H4 A18 A20 DQ2 DQ10 DQ0 DQ8 CE1 CE2 Am29PDL129H DQ15 DQ13 DQ6 DQ4 DQ11 DQ3 J3 K3 DQ9 DQ1 ...

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... November 2, 2005 WP#/ACC the device RESET Am29PDL129H the device is either executing an em- bedded algorithm or the device is executing a hardware reset opera- tion. = Write Protect/Acceleration Input. When WP/ACC the highest IL and lowest two 4K-word sectors are write protected regardless of other sector protection configurations ...

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... SPEED OPTION See Product Selector Guide and Valid Combinations PROCESS TECHNOLOGY H = 0.13 µm Note: For the Am29PDL129H, the last digit of the speed grade specifies the V IO example: 53, 63) indicate a 3 Volt V (for example: 68, 88) indicate a 1.8 Volt V Fujitsu for availability of 1.8V V ...

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... DEVICE BUS OPERATIONS Table 1. Am29PDL129H Device Bus Operations Operation CE1# L Read H L Write Standby 0.3 V Output Disable L Reset X Temporary Sector Unprotect (High X Voltage) Legend Logic Low = Logic High = Address In Data In Data Out IN IN OUT Notes: 1. The sector protect and sector unprotect functions may also be implemented via programming equipment. . ...

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... Table 3. Bank Select Bank CE1# CE2# Bank Bank Bank 2A A21–A20 Bank 2B 00, 01 Am29PDL129H 01, 10, 11 November 2, 2005 ...

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... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA1-0 0 SA1-1 0 SA1-2 0 SA1-3 0 SA1-4 0 SA1-5 0 SA1-6 0 SA1-7 0 SA1-8 0 SA1-9 0 SA1-10 0 SA1-11 0 SA1-12 0 SA1-13 0 SA1-14 0 SA1-15 0 SA1-16 0 SA1-17 0 SA1-18 0 SA1-19 0 SA1-20 0 SA1-21 0 SA1-22 0 SA1-23 0 SA1-24 0 SA1-25 0 SA1-26 0 SA1-27 0 SA1-28 0 SA1-29 0 SA1-30 0 SA1-31 0 SA1-32 0 SA1-33 ...

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... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA1-38 0 SA1-39 0 SA1-40 0 SA1-41 0 SA1-42 0 SA1-43 0 SA1-44 0 SA1-45 0 SA1-46 0 SA1-47 0 SA1-48 0 SA1-49 0 SA1-50 0 SA1-51 0 SA1-52 0 SA1-53 0 SA1-54 0 SA1-55 0 SA1-56 0 SA1-57 0 SA1-58 0 SA1-59 0 SA1-60 0 SA1-61 0 SA1-62 0 SA1-63 0 SA1-64 0 SA1-65 0 SA1-66 0 SA1-67 0 SA1-68 0 SA1-69 0 SA1-70 0 SA1-71 ...

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... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA1-78 0 SA1-79 0 SA1-80 0 SA1-81 0 SA1-82 0 SA1-83 0 SA1-84 0 SA1-85 0 SA1-86 0 SA1-87 0 SA1-88 0 SA1-89 0 SA1-90 0 SA1-91 0 SA1-92 0 SA1-93 0 SA1-94 0 SA1-95 0 November 2, 2005 Sector Address (A21- Sector Size CE2# A12) (Kwords) 1 1001110XXX 1 1001111XXX 1 1010000XXX 1 1010001XXX 1 1010010XXX 1 1010011XXX ...

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... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA1-96 0 SA1-97 0 SA1-98 0 SA1-99 0 SA1-100 0 SA1-101 0 SA1-102 0 SA1-103 0 SA1-104 0 SA1-105 0 SA1-106 0 SA1-107 0 SA1-108 0 SA1-109 0 SA1-110 0 SA1-111 0 SA1-112 0 SA1-113 0 SA1-114 0 SA1-115 0 SA1-116 0 SA1-117 0 SA1-118 0 SA1-119 0 SA1-120 0 SA1-121 0 SA1-122 0 SA1-123 0 SA1-124 0 SA1-125 0 SA1-126 0 SA1-127 0 SA1-128 0 SA1-129 ...

Page 17

... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA2-0 1 SA2-1 1 SA2-2 1 SA2-3 1 SA2-4 1 SA2-5 1 SA2-6 1 SA2-7 1 SA2-8 1 SA2-9 1 SA2-10 1 SA2-11 1 SA2-12 1 SA2-13 1 SA2-14 1 SA2-15 1 SA2-16 1 SA2-17 1 SA2-18 1 SA2-19 1 SA2-20 1 SA2-21 1 SA2-22 1 SA2-23 1 SA2-24 1 SA2-25 1 SA2-26 1 SA2-27 1 SA2-28 1 SA2-29 1 SA2-30 1 SA2-31 1 SA2-32 1 SA2-33 ...

Page 18

... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA2-39 1 SA2-40 1 SA2-41 1 SA2-42 1 SA2-43 1 SA2-44 1 SA2-45 1 SA2-46 1 SA2-47 1 SA2-48 1 SA2-49 1 SA2-50 1 SA2-51 1 SA2-52 1 SA2-53 1 SA2-54 1 SA2-55 1 SA2-56 1 SA2-57 1 SA2-58 1 SA2-59 1 SA2-60 1 SA2-61 1 SA2-62 1 SA2-63 1 SA2-64 1 SA2-65 1 SA2-66 1 SA2-67 1 SA2-68 1 SA2-69 1 SA2-70 1 SA2-71 1 SA2-72 ...

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... Table 4. Am29PDL129H Sector Architecture Bank Sector CE1# SA2-79 1 SA2-80 1 SA2-81 1 SA2-82 1 SA2-83 1 SA2-84 1 SA2-85 1 SA2-86 1 SA2-87 1 SA2-88 1 SA2-89 1 SA2-90 1 SA2-91 1 SA2-92 1 SA2-93 1 SA2-94 1 SA2-95 1 SA2-96 1 SA2-97 1 SA2-98 1 SA2-99 1 SA2-100 1 SA2-101 1 SA2-102 1 SA2-103 1 SA2-104 1 SA2-105 1 SA2-106 1 SA2-107 1 SA2-108 1 SA2-109 1 SA2-110 1 SA2-111 1 SA2-112 ...

Page 20

... H Sector Protection L Verification Indicator Bit L (DQ7, DQ6 Legend Logic Low = Logic High = accessed in-system via command sequences Table 7. Am29PDL129H Boot Sector/Sector Block Addresses for Protection/Unprotection 18 Sector Address (A21- CE2# A12) 0 1110000XXX 0 1110001XXX 0 1110010XXX 0 1110011XXX 0 1110100XXX 0 1110101XXX ...

Page 21

... SA1-130 1111111011 SA1-131 1111111100 SA1-132 1111111101 SA1-133 1111111110 SA1-134 1111111111 November 2, 2005 Table 8. Am29PDL129H Boot Sector/Sector Block Sector/Sector Block Addresses for Protection/Unprotection Size 128 (4x32) Kwords 128 (4x32) Kwords Sector 128 (4x32) Kwords Group 128 (4x32) Kwords SA2-0 128 (4x32) Kwords ...

Page 22

... The SecSi Sector Factory-locked Indicator Bit (DQ7) is per- manently set to a “1”. AMD offers the ExpressFlash service to program the factory-locked area with a ran- dom ESN, a customer-defined code, or any combina- Am29PDL129H ) to be placed on the ID Figure 1 for details on this pro- ...

Page 23

... The Customer-lockable area can be protected using one of the following procedures: Follow the SecSi Sector Protection Algorithm as shown in . This allows in-system protection of the SecSi Sector without raising any device pin to a high voltage. Note that this method is only applicable to the SecSi Sector. Am29PDL129H 21 ...

Page 24

... A7–A0 = 00011010 No Data = 01h? Yes SecSi Sector Protection Completed SecSi Sector Exit Write 555h/AAh Write 2AAh/55h Write SA0+555h/90h Write XXXh/00h Figure 3. SecSi Sector Protection Algorithm ■ To verify the protect/unprotect status of the SecSi 22 Sector, follow the algorithm shown in Am29PDL129H Figure 4. November 2, 2005 ...

Page 25

... For further information, please refer to the CFI Specification and CFI Publication 100, available via the World Wide Web at http://www.amd.com/flash/cfi. Alternatively, contact an AMD representative for copies of these documents. Table 10. CFI Query Identification String Addresses Data November 2, 2005 Figure 4. SecSi Sector Protect Verify Description Am29PDL129H 23 ...

Page 26

... Max. number of byte in multi-byte write = 2 (00h = not supported) Number of Erase Block Regions within device Erase Block Region 1 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 2 Information (refer to the CFI specification or CFI publication 100) Am29PDL129H N µs N µ s (00h = not supported) N ...

Page 27

... November 2, 2005 Erase Block Region 3 Information (refer to the CFI specification or CFI publication 100) Erase Block Region 4 Information (refer to the CFI specification or CFI publication 100) Am29PDL129H 25 ...

Page 28

... Top and Bottom Program Suspend 0 = Not supported Supported Bank Organization 00 = Data at 4Ah is zero Number of Banks Bank 1 Region Information X = Number of Sectors in Bank 1 Bank 2 Region Information X = Number of Sectors in Bank 2 Bank 3 Region Information X = Number of Sectors in Bank 3 Bank 4 Region Information X = Number of Sectors in Bank 4 Am29PDL129H November 2, 2005 ...

Page 29

... Sector Protection Status either the PPB or DYB for a given sector or sector group can be verified by writing a Sector Protection Status command to the device. Note that there is no single command to independently verify the programming of a DYB for a given sector group. Am29PDL129H The programming of 27 ...

Page 30

... Command is valid when device is ready to read array data or when device is in autoselect mode. 14. must 15. Unlock Bypass Entry command is required prior to any Unlock Bypass operation. Unlock Bypass Reset command is required to for return to the reading array. Am29PDL129H Addr Data Addr Data Addr (BA)X00 ...

Page 31

... Following the final cycle of the command sequence, the user must write the first three cycles of the Autoselect command and then write a Reset command. 18. If checking the DYB status of sectors in multiple banks, the user must follow Note 17 before crossing a bank boundary. Am29PDL129H Data Addr Data Addr ...

Page 32

... Operating ranges define those limits between which the functionality of the device is guaranteed. 30 +0.8 V –0.5 V –2 – 2 contact IO CC Am29PDL129H Figure 6. Maximum Negative Overshoot Waveform Figure 7. Maximum Positive Overshoot Waveform November 2, 2005 ...

Page 33

... Embedded Erase or Embedded Program progress. 5. Automatic sleep mode enables the low power mode when addresses remain stable for t current is 1 μ CCmax 6. Not 100% tested. Am29PDL129H Min Typ Max Unit ±1.0 µA 35 µA 35 µA ±1.0 µA ...

Page 34

... Note: For 70 pF output load capacitance will be added = 2.7 – 3 certain read-only operation parameters. INPUTS Steady Changing from Changing from Does Not Apply Center Line is High Impedance State (High Z) Measurement Level Am29PDL129H All Speeds Unit 1 TTL gate 0.0–3 ...

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... V , CE2 (CE1 Valid CE1#/CE2# transitions: (CE1 CE2#= (CE1 For 70 pF output load capacitance will be added PACC OE Am29PDL129H All Speed Options 30 t CCR Speed Options Min Max 55 ...

Page 36

... RC Addresses Stable t ACC OEH t CE HIGH Z Figure 11. Read Operation Timings ; During CE2# transitions, CE1 Same Page PACC t ACC Qa ; During CE2# transitions, CE1 Am29PDL129H HIGH Z Valid Data PACC PACC November 2, 2005 ...

Page 37

... Min Min Min Min Ready Reset Timings NOT during Embedded Algorithms Reset Timings during Embedded Algorithms t Ready t RP Figure 13. Reset Timings ; During CE2# transitions, CE1 Am29PDL129H All Speed Options Unit 20 µs 500 ns 500 µ ...

Page 38

... See the “Erase And Programming Performance” section for more information. 36 Speed Options 53 Min 55 Min Min Min 30 Min Min 25 Min Min Min Min Min Min 35 Min 20 Min Typ Typ Typ Min Min Max Am29PDL129H Unit ...

Page 39

... WPH A0h t BUSY is the true data at the program address. OUT ; During CE2# transitions, CE1 Figure 14. Program Operation Timings Am29PDL129H Read Status Data (last two cycles WHWH1 Status D OUT VHH 37 ...

Page 40

... SA = sector address (for Sector Erase Valid Address for reading status data (.) 2. During CE1# transitions, CE2 During CE2# transitions, CE1 Figure 16. Chip/Sector Erase Operation Timings 555h for chip erase WPH t DH 30h 10 for Chip Erase t BUSY IH Am29PDL129H Read Status Data WHWH2 Status D OUT t RB November 2, 2005 ...

Page 41

... GHWL Valid Out t SR/W Read Cycle ; During CE2# transitions, CE1 Complement Complement Status Data Status Data ; IH Am29PDL129H Valid PA Valid CPH Valid Valid In In CE# Controlled Write Cycles VA High Z Valid Data True High Z ...

Page 42

... AHT t ASO t CEPH t OEPH t OE Valid Valid Status Status (first read) (second read) IH Enter Erase Suspend Program Erase Erase Suspend Suspend Read Program Figure 20. DQ2 vs. DQ6 Am29PDL129H Valid Valid Data Status (stops toggling) Erase Resume Erase Erase Complete Read November 2, 2005 ...

Page 43

... Note: During CE1# transitions, CE2#= V Figure 21. Temporary Sector Unprotect Timing Diagram November 2, 2005 Min Min Min Min t VIDR Program or Erase Command Sequence t RSP ; During CE2# transitions, CE1 Am29PDL129H All Speed Options Unit 500 ns 250 ns 4 µs 4 µ ...

Page 44

... For sector protect For sector unprotect Notes: 1. During CE1# transitions, CE2 Figure 22. Sector/Sector Block Protect and Unprotect Timing Diagram 42 Valid* 60h Sector Group Protect: 150 µs Sector Group Unprotect During CE2# transitions, CE1 Am29PDL129H Valid* Valid* Verify 40h Status November 2, 2005 ...

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... Not 100% tested. 2. See the “Erase And Programming Performance” section for more information. November 2, 2005 53 Min 55 Min Min 30 Min 25 Min Min Min Min Min 35 Min 20 Typ Typ Typ Am29PDL129H Speed Options Unit ...

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... SA for sector erase 555 for chip erase Data# Polling GHEL t t WHWH1 CPH t BUSY for program PD for program 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT IH Am29PDL129H PA DQ7# D OUT November 2, 2005 ...

Page 47

... V, 1,000,000 cycles. All values are subject to change. CC –100 mA = 3.0 V, one pin at a time Test Setup OUT V IN Test Conditions Am29PDL129H Unit Comments sec Excludes 00h programming prior to erasure (Note 4) sec Excludes system level µs overhead (Note 5) µs sec , 1,000,000 cycles. Additionally, ...

Page 48

... Changed most CE# references to CE1#. Changed Bank C to Bank 1A, Bank D to Bank 1B, Bank A to Bank 2A, and Bank B to Bank 2B. Sector Configuration Table Corrected CE1# and CE2# bank references. Table 4. Am29PDL129H Sector Architecture Changed the Bank order to 1A, 1B, 2A, and 2B. Am29PDL129H November 2, 2005 ...

Page 49

... Table 7. Am29PDL129H Boot Sector/Sector Block Addresses for Protection/Unprotection Broke table up into CE1# and CE2# versions and made modifications to table values to reflect change. WP# Hardware Protection Indicated that a write protect pin that can prevent pro- gram or erase operations in sectors SA1-133, SA1- 134, SA2-0 and SA2-1. ...

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