UC1606 ETC1 [List of Unclassifed Manufacturers], UC1606 Datasheet
UC1606
Related parts for UC1606
UC1606 Summary of contents
Page 1
H IGH 65COM x 132SEG Matrix LCD Controller-Driver Product Specifications Version 1. OLTAGE IXED IGNAL U The Coolest LCD Driver. Ever!! IC September 24, 2003 C LTRA HIP ...
Page 2
... LCD Voltage Settings .......................................................................................15 LCD Display Controls .......................................................................................18 Host Interface ....................................................................................................20 Display Data RAM .............................................................................................24 Reset & Power Management ............................................................................27 Absolute Maximum Ratings .............................................................................31 Specifications....................................................................................................32 AC Characteristics............................................................................................33 Physical Dimensions ........................................................................................37 Alignment Mark Information ............................................................................38 Pad Coordinates ...............................................................................................39 Tray Information................................................................................................42 Revision History................................................................................................43 Version 1. ABLE OF ONTENT UC1606 65x132 Matrix LCD Controller-Drivers 1 ...
Page 3
... Capacitor Coupling) driver architecture to achieve near crosstalk free images. In addition to low power COM and SEG drivers, UC1606 contain all necessary circuits for high-V LCD power supply, bias voltage generation, timing generation and graphics data memory. Advanced circuit design techniques are ...
Page 4
... U C LTRA HIP High-Voltage Mixed-Signal RDERING NFORMATION Product ID UC1606xGAF General Notes A I PPLICATION NFORMATION For improved readability, the specification contains many application data points. When application information is given advisory and does not form part of the specification for the device ...
Page 5
... POWER-ON & RESET CONTROL CLOCK & TIMING GEN. CONTROL & STATUS REGISTER COMMAND HOST INTERFACE Version 1.32 COLUMN ADDRESS GENERATOR DISPLAY DATA RAM DISPLAY DATA LATCHES LEVEL SHIFTERS SEG DRIVERS UC1606 65x132 Matrix LCD Controller-Drivers V & BIAS LCD C L GENERATOR ...
Page 6
U C LTRA HIP High-Voltage Mixed-Signal ESCRIPTION Name Type Pins PWR DD2 V DD3 V SS GND V SS2 V V B1+ B1– PWR V V B0+ B0– V LCD-IN PWR V LCD-OUT ...
Page 7
... H I OST NTERFACE “LL”: serial (S8) “HL”: 8080 *1 DD ”L”: Command ”H”: Display data . SS PS=1x PS= SCK SDA UC1606 65x132 Matrix LCD Controller-Drivers “LH”: serial (S9) “HH”: 6800 . SS. 5 ...
Page 8
... Test I/O pins. Leave these pins open circuit during normal use. TP[3:1] I Test control. Leave these pins open circuit during normal use. *1 When read data is needed under joint bus (using more than one UC1606), following application circuits are recommended. Each R/W (RD) pin should be separated from others. (UC1606)U1 (UC1606)U1 CS0 ...
Page 9
... UC1606 contains registers which control the chip operation. These registers can be modified by commands. The following table is a summary of the control registers, their meaning and their default value. The commands supported by UC1606 are described in the next two sections, first a summary table, followed by a detailed description. ...
Page 10
U C LTRA HIP High-Voltage Mixed-Signal IC Name Bits Default OM 2 – Operating Modes (Read Only – Busy with internal processes (reset, changing mode, etc.) OK for Display RAM read/write access Reset in progress, Host ...
Page 11
... C T OMMAND ABLE The following is a list of host commands supported by UC1606 C/D: 0: Control, W/R: 0: Write Cycle, # Useful Data bits – Don’t Care Command C/D W Write Data Byte 1 2 Read Data Byte 1 3 Get Status 0 Set Column Address LSB 0 4 Set Column Address MSB ...
Page 12
U C LTRA HIP High-Voltage Mixed-Signal IC C OMMAND DESCRIPTION (1) Write data to display memory Action Write data (2) Read data to display memory Action Read data Write/Read Data Byte (command 1,2 ) operation accesses display buffer RAM based ...
Page 13
... SL5 SL4 SL3 SL2 SL1 SL0 Image row N 0 ………. Image row 63 Image row 0 N ……… image row N-1 SL=N C/D W UC1606 65x132 Matrix LCD Controller-Drivers PC2 PC1 PC0 ...
Page 14
... Set DC[0] to force all SEG drivers to output the inverse of the data which stored in display memory. This function has no effect on the existing data stored in display RAM. (15) Set Display Enable Action Set Display Enable DC[2] This command is for programming registers DC[2]. When DC[2] is set to 1, UC1606 will turn on COM drivers and SEG drivers. 12 C/D W ...
Page 15
... C/D W Bias Ratio (BR[1:0]) Mux Rate 7.33 8.0 8.66 49 6.0 6.67 7.33 33/25 4.67 5.33 6.0 C/D W UC1606 65x132 Matrix LCD Controller-Drivers LC1 MSF BR1 BR0 11 9 ...
Page 16
U C LTRA HIP High-Voltage Mixed-Signal IC (21) Set Cursor Mode Action Set AC[3]=1 CR=CA Set Cursor Mode command is used to turn on cursor update mode function. AC[3] will be set to 1, register CR will be set to ...
Page 17
... LCD V S OLTAGE ETTINGS M R ULTIPLEX ATES Four multiplex rates are supported in UC1606 (65, 49, 33, 25 not software programmable determined by pin programming IAS ELECTION Bias Ratio (BR) is defined as the ratio between V and where V LCD B LCD – B1– ...
Page 18
... Due to the use of fully embedded power supply, built-in power ready detector, and drain circuit, there is no rigid power up or power down sequences for UC1606 16 controllers when using internal V LCD generator. ...
Page 19
... The illustrated resistor values are for reference only. Please optimize for specific requirements of each application. Version 1.32 VB0+ CB0 VB0- VB1+ CB1 VB1- VLCDOUT VLCDIN CL VB0+ CB0 VB0- VB1+ CB1 VB1- VLCDOUT VLCDIN EXTERNAL VLCD SOURCE CL RL (OPTIONAL) 2: Reference circuit using external Hi-V source UC1606 65x132 Matrix LCD Controller-Drivers RL (OPTIONAL) 17 ...
Page 20
... Driver Enable is controlled by the value of DC[2] via Set Display ON command. When DC[2] is set to OFF (logic “0”), both SEG and COM drivers will become idle and UC1606 will put itself into Sleep mode to conserve power. When DC[2] is set to ON, the DE flag will become “1”,and UC1606 will first exit from Sleep mode, ...
Page 21
... RAM W/R EO COM1 COM2 COM3 SEG1 SEG2 Figure 3: COM and SEG Driving Waveform Version 1.32 UC1606 65x132 Matrix LCD Controller-Drivers 19 ...
Page 22
... U C LTRA HIP High-Voltage Mixed-Signal OST NTERFACE As summarized in the table below, UC1606 supports two 8-bit parallel bus protocols and two serial bus protocols. Designers can choose either Bus Type PS[1:0] CS[1:0] CD WR0 WR1 Access D[7:0] * Connect unused control pins ARALLEL NTERFACE ...
Page 23
... S I ERIAL NTERFACE UC1606 supports two serial modes, 4-wire mode (PS=”LL”), and 3-wire mode (PS=”LH”). The mode of interface is determined during power-up process by the value of PS[1:0 (S8) WIRE ERIAL NTERFACE Only write operations are supported in 4-wire serial mode. Pin CS[1:0] are used for chip select and bus cycle reset ...
Page 24
... WR0(WR) WR1(RD) CS0 DECODER CS1 VDD VDD RST PS1 PS0 6: 8080/8bit parallel mode reference circuit D7-D0 CD WR0(R/W) WR1(E) CS0 DECODER CS1 VDD VDD RST PS1 PS0 7: 6800/8bit parallel mode reference circuit ©1999-2003 VDD VDD UC1606 VSS VDD VDD UC1606 VSS Product Specifications ...
Page 25
... SCK SCK(D0) SDA SDA(D2) ADDRESS IORQ DECODER VDD VDD 9: Serial-9 serial mode reference circuit UC1606 65x132 Matrix LCD Controller-Drivers VDD VDD CD WR0 WR1 CS0 UC1606 CS1 RST PS1 PS0 VSS VDD VDD WR0 WR1 CS0 UC1606 CS1 RST PS1 PS0 VSS 23 ...
Page 26
... RGANIZATION The display data is 1-bit per pixel and stored in a dual port static RAM (RAM, for Display Data RAM). The RAM size 132 for UC1606. This array of data bits is further organized into pages of 8 bit slices to facilitate parallel bus interface. ...
Page 27
... C55 C39 C56 C40 C57 C41 C58 C42 C59 C43 C60 C44 Page 7 C61 C45 C62 C46 C63 C47 C64 C48 Page 8 CIC CIC UC1606 MY=1 SL=0 SL=25 SL=25 C64 C48 C25 C9 C63 C47 C24 C8 C62 C46 C23 C7 C61 C45 C22 C6 C60 C44 C21 C5 C59 ...
Page 28
U C LTRA HIP High-Voltage Mixed-Signal MPLEMENTATION Column Mirroring (MX) is implemented by selecting either (CA) or (64–CA) as the RAM column address. Changing MX affects the data written to the RAM. Since MX has no effect ...
Page 29
... UC1606 contains internal logic to check whether V and V are ready before releasing COM LCD BIAS and SEG drivers from their idle states. When exiting Sleep or Reset Mode, COM and SEG drivers will not be activated until UC1606 internal voltage sources are restored to their proper values. 11 Active OFF ...
Page 30
... OWER P EQUENCE UC1606 power-up sequence is simplified by built-in “Power Ready” flags and the automatic invocation of System-Reset command after Power-ON-Reset. System programmers are only required to wait 20 before the CPU starting to issue commands to UC1606. No additional time sequences are required between enabling the charge pump, turning on the display drivers, writing to RAM or any other commands ...
Page 31
... Set Display Enable Chip action (17) System Reset – – – – Draining capacitor UC1606 65x132 Matrix LCD Controller-Drivers Comments Wait ~30ms after Set up LCD specific parameters such as format, MX, MY, MSF, etc. Set up display image Comments Wait 3~5ms before V ...
Page 32
U C LTRA HIP High-Voltage Mixed-Signal -OFF RIEF ISPLAY Type C/D W ...
Page 33
... LCD V Any Input Voltage IN T Operating temperature range OPR T Storage temperature STR Notes 1. V based Stress values listed above may cause permanent damages to the device. Version 1.32 Parameter UC1606 65x132 Matrix LCD Controller-Drivers Min. Max. Unit -0.3 +5.5 V -0.3 +5.5 V -0.3 +5.5 V -0.3 +15 ...
Page 34
U C LTRA HIP High-Voltage Mixed-Signal IC S PECIFICATIONS DC C HARACTERISTICS Symbol Parameter V Supply for digital circuit DD V Supply for bias & pump DD2/3 V Charge pump output LCD V LCD data voltage D V Input logic ...
Page 35
... AH80 t CY80 , t t PWW80 HPW80 t t DS80 DH80 t t ACC80 OD80 o C) Description Condition Description Condition C L UC1606 65x132 Matrix LCD Controller-Drivers t t CSH80 CSSD80 Min. Max. Units – 300 – 85 – 85 – 85 – 40 – 100pF – 140 10 ...
Page 36
U C LTRA HIP High-Voltage Mixed-Signal AS68 CS0 CS1 t CSSA68 t PWR68 WR1 Write D[7:0] Read D[7:0] Figure 13: Parallel Bus Timing Characteristics (for 6800 MCU) (VDD=2.4V to 3.0V, Ta= –30 to +85 Symbol Signal t ...
Page 37
... C) Description Condition Address setup time Address hold time System cycle time Low pulse width High pulse width Data setup time Data hold time Chip select setup time UC1606 65x132 Matrix LCD Controller-Drivers t t CSHS CSSDS Min. Max. Units 15 – – ...
Page 38
U C LTRA HIP High-Voltage Mixed-Signal IC RST (VDD=2.4V to 3.0V, Ta= –30 to +85 Symbol Signal t RST Reset low pulse width RW (VDD=3.0V to 4.0V, Ta= –30 to +85 Symbol Signal t RST Reset low pulse width RW ...
Page 39
... UMP SIZE 2 86 46µm (Typ µ (Typ INIMUM UMP PITCH 70µm (Typ INIMUM UMP AP 24µm (Typ OORDINATE ORIGIN Chip center REFERENCE Pad center (Drawings and coordinates are in the circuit/bump view) Version 1.32 UC1606 65x132 Matrix LCD Controller-Drivers 37 ...
Page 40
U C LTRA HIP High-Voltage Mixed-Signal LIGNMENT ARK NFORMATION D-Left Mark S HAPE OF THE ALIGNMENT MARK C : OORDINATES D-Left Mark Center X -4610 IZE R: 18.0 µm; r: 9.0 µ ...
Page 41
... BR1 VDDX TC0 TC1 VB0 VB0 VB0 VB0+ UC1606 65x132 Matrix LCD Controller-Drivers -2644 -706 46 86 -2574 -706 46 86 -2394 -723 86 46 -2287 -723 86 46 -2180 -723 86 46 -2074 -723 86 46 -1967 ...
Page 42
U C LTRA HIP High-Voltage Mixed-Signal IC # Name TST1 3074 -706 100 TST2 3144 -706 101 TST3 3214 -706 102 VLCDIN 3354 -706 103 VLCDOUT 3424 -706 104 VLCDIN 3494 -706 105 VLCDOUT 3634 -706 106 ...
Page 43
... UC1606 65x132 Matrix LCD Controller-Drivers -3185 706 46 86 -3255 706 46 86 -3325 706 46 86 -3395 706 46 86 -3465 706 46 86 -3535 706 46 86 -3605 ...
Page 44
U C LTRA HIP High-Voltage Mixed-Signal RAY NFORMATION 42 ©1999~2003 Product Specifications ...
Page 45
... Figures 12, 13 and 14 are patched by adding pulse CS1. (Section ”AC Characteristics”, Pp 33-35) Version 1.32 Contents First release Product naming rule added Operation Voltage up to 5.0V Over All revision / ”, Page 24) UC1606 65x132 Matrix LCD Controller-Drivers Date of Rev. Jul. 06, 2001 Oct. 30, 2001 Dec. 18, 2001 Aug. 16, 2002 Jun. 18, 2003 43 ...
Page 46
U C LTRA HIP High-Voltage Mixed-Signal IC Version (1) Section “Table of Revision History” is renamed as “Revision History” and moved to the rear of the datasheet. (2) Recommended CB value has been modified: ~ 100x (Section “Pin Description”, page ...