CY7C026A-12AC Cypress Semiconductor Corporation., CY7C026A-12AC Datasheet
CY7C026A-12AC
Manufacturer Part Number
CY7C026A-12AC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheets
1.CY7C026A-12AC.pdf
(18 pages)
2.CY7C026A-12AC.pdf
(17 pages)
3.CY7C026A-12AC.pdf
(17 pages)
Specifications of CY7C026A-12AC
Case
TQFP
Date_code
06
25/0251
Features
Notes:
Cypress Semiconductor Corporation
1.
2.
3.
4.
• True dual-ported memory cells which allow simulta-
• 16K x 16 organization (CY7C026A)
• 16K x 18 organization (CY7C036A)
• 0.35-micron CMOS for optimum speed/power
• High-speed access: 12
• Low operating power
• Fully asynchronous operation
Logic Block Diagram
R/W
UB
OE
I/O
I/O
A
A
CE
OE
R/W
SEM
BUSY
INT
UB
LB
CE
LB
neous access of the same memory location
— Active: I
— Standby: I
0L
0L
See page 6 for Load Conditions.
I/O
I/O
BUSY is an output in master mode and an input in slave mode.
L
8/9L
0L
L
L
L
L
L
L
L
–A
–A
L
L
L
8
0
L
–I/O
–I/O
–I/O
L
13L
13L
–I/O
[4]
15
7
[3]
7/8L
for x16 devices; I/O
for x16 devices; I/O
[2]
15/17L
CC
SB3
= 180 mA (typical)
= 0.05 mA (typical)
For the most recent information, visit the Cypress web site at www.cypress.com
8/9
8/9
14
0
[1]
9
–I/O
–I/O
/15/20 ns
8
Address
17
Decode
for x18 devices.
for x18 devices.
14
•
3901 North First Street
Control
I/O
True Dual-Ported
Semaphore
RAM Array
Arbitration
Interrupt
16K x 16/18 Dual-Port Static RAM
M/S
• Automatic power-down
• Expandable data bus to 32/36 bits or more using Mas-
• On-chip arbitration logic
• Semaphores included to permit software handshaking
• INT flags for port-to-port communication
• Separate upper-byte and lower-byte control
• Pin select for Master or Slave
• Commercial and Industrial temperature ranges
• Available in 100-Pin TQFP
• Pin-compatible and functionally equivalent to IDT70261
ter/Slave chip select when using more than one device
between ports
Control
I/O
•
San Jose
Address
Decode
14
•
CA 95134
8/9
8/9
14
CY7C026A
CY7C036A
I/O
•
8/9L
I/O
March 3, 2000
408-943-2600
[4]
–I/O
0L
A
A
0R
0R
–I/O
BUSY
SEM
–A
–A
R/W
15/17R
R/W
[2]
CE
INT
UB
LB
OE
OE
CE
UB
LB
[3]
7/8R
13R
13R
R
R
R
R
R
R
R
R
R
R
R
R
R
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