74LVT162373DGG,118 NXP Semiconductors, 74LVT162373DGG,118 Datasheet - Page 4

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74LVT162373DGG,118

Manufacturer Part Number
74LVT162373DGG,118
Description
IC 16BIT TRANSP LATCH 48TSSOP
Manufacturer
NXP Semiconductors
Series
74LVTr
Datasheet

Specifications of 74LVT162373DGG,118

Logic Type
D-Type Transparent Latch
Package / Case
48-TSSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
3ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
LVT
Polarity
Non-Inverting
Input Bias Current (max)
4000 uA
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
2.5 ns at 3.3 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.7 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935264164118
Philips Semiconductors
LOGIC DIAGRAM
FUNCTION TABLE
H = High voltage level
h = High voltage level one set-up time prior to the High-to-Low E transition
L = Low voltage level
l
NC= No change
X = Don’t care
Z = High impedance “off ” state
SCHEMATIC OF EACH OUTPUT
1999 Sep 23
nOE
3.3 V LVT 16-bit transparent D-type latch
with 30
nLE
= Low voltage level one set-up time prior to the High-to-Low E transition
= High-to-Low LE transition
nOE
H
H
L
L
L
L
L
INPUTS
nD0
V
nLE
termination resistors (3-State)
CC
H
H
H
L
L
D
E
Q
nQ0
nD1
nDx
nDx
H
X
X
L
h
l
D
E
27
27
Q
nQ1
SW00503
OUTPUT
REGISTER
INTERNAL
nD2
nDx
NC
NC
D
E
H
H
L
L
Q
nQ2
nD3
nQ0 – nQ7
OUTPUTS
D
E
4
NC
H
H
L
L
Z
Z
Q
nQ3
nD4
D
E
Enable and read register
Latch and read register
Hold
Disable outputs
Q
nQ4
nD5
D
E
OPERATING MODE
OPERATING MODE
Q
nQ5
nD6
D
E
74LVT162373
Q
nQ6
Product specification
nD7
D
E
Q
SA00046
nQ7

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