74LVC373APW,112 NXP Semiconductors, 74LVC373APW,112 Datasheet - Page 10
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74LVC373APW,112
Manufacturer Part Number
74LVC373APW,112
Description
IC OCTAL D TRANSP LATCH 20TSSOP
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet
1.74LVC373APW118.pdf
(20 pages)
Specifications of 74LVC373APW,112
Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
2.7 V ~ 3.6 V
Independent Circuits
1
Delay Time - Propagation
1.5ns
Current - Output High, Low
24mA, 24mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
20-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74LVC373APW
74LVC373APW
935218650112
74LVC373APW
935218650112
Philips Semiconductors
Notes
1. Typical values are measured at V
2. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed
AC WAVEFORMS
2003 May 19
T
t
t
t
t
t
t
t
SYMBOL
PHL
PZH
PHZ
W
su
h
sk(0)
amb
Octal D-type transparent latch with
5 V tolerant inputs/outputs; 3-state
V
V
V
by design.
M
M
OL
/t
/t
/t
PLH
= 1.5 V at V
= 0.5 V
PZL
PLZ
= 40 to +125 C
and V
OH
CC
propagation delay Dn to Qn see Figs 8 and 12
propagation delay LE to Qn see Figs 9 and 12
3-state output enable time
OE to Qn
3-state output disable time
OE to Qn
LE pulse width HIGH
set-up time Dn to LE
hold time Dn to LE
skew
are the typical output voltage drop that occur with the output load.
at V
CC
CC
2.7 V;
< 2.7 V.
PARAMETER
handbook, halfpage
Fig.8 Input (Dn) to output (Qn) propagation delays.
Qn output
Dn input
CC
= 3.3 V and T
see Figs 10 and 12 2.7
see Figs 10 and 12 2.7
see Fig.9
see Fig.11
see Fig.11
note 2
WAVEFORMS
GND
V OH
V OL
V I
TEST CONDITIONS
amb
10
= 25 C.
V M
V M
t PHL
2.7
3.0 to 3.6
2.7
3.0 to 3.6
3.0 to 3.6
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
2.7
3.0 to 3.6
V
CC
(V)
1.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
4.5
4.5
2.0
2.0
1.5
1.5
MNA884
MIN.
t PLH
TYP.
Product specification
74LVC373A
10.0
8.5
10.5
9.0
11.0
10.0
9.0
8.0
1.5
MAX.
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
UNIT