74AUP1G0832GF,132 NXP Semiconductors, 74AUP1G0832GF,132 Datasheet - Page 9

IC GATE AND/OR 3-IN 6-XSON

74AUP1G0832GF,132

Manufacturer Part Number
74AUP1G0832GF,132
Description
IC GATE AND/OR 3-IN 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet

Specifications of 74AUP1G0832GF,132

Number Of Circuits
1
Package / Case
6-XSON, SOT891
Logic Type
AND/OR Gate
Number Of Inputs
3 Input (2, 1)
Schmitt Trigger Input
Yes
Output Type
Single-Ended
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
19 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
74AUP1G0832GF-H
74AUP1G0832GF-H
935281326132
NXP Semiconductors
Table 9.
Voltages are referenced to GND (ground = 0 V); for test circuit see
[1]
[2]
[3]
12. Waveforms
74AUP1G0832
Product data sheet
Symbol Parameter
T
C
Fig 9. Input A, B and C to output Y propagation delay times
amb
PD
All typical values are measured at nominal V
t
C
P
f
f
C
V
N = number of inputs switching;
Σ(C
pd
i
o
D
CC
= 25 °C
PD
= input frequency in MHz;
L
= output frequency in MHz;
is the same as t
= output load capacitance in pF;
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in V;
× V
Measurement points are given in
power dissipation
capacitance
V
PD
OL
Dynamic characteristics
CC
× V
2
and V
× f
CC
o
2
) = sum of the outputs.
OH
× f
PLH
i
are typical output voltage levels that occur with the output load.
× N + Σ(C
and t
PHL
Conditions
f
i
A, B, C input
= 1 MHz; V
L
.
V
V
V
V
V
V
× V
CC
CC
CC
CC
CC
CC
Y output
Y output
CC
= 0.8 V
= 1.1 V to 1.3 V
= 1.4 V to 1.6 V
= 1.65 V to 1.95 V
= 2.3 V to 2.7 V
= 3.0 V to 3.6 V
2
…continued
Table
× f
GND
V
V
V
V
o
All information provided in this document is subject to legal disclaimers.
OH
OH
) where:
OL
OL
I
V
= GND to V
CC
I
10.
.
Rev. 3 — 5 October 2010
V
CC
M
D
in μW).
V
V
M
M
t
t
PHL
PLH
[3]
Figure
Min
-
-
-
-
-
-
10.
25 °C
Typ
2.5
2.7
2.8
2.9
3.4
4.0
[1]
V
M
Max
V
V
M
M
-
-
-
-
-
-
t
t
PLH
PHL
001aab593
Low-power 3-input AND-OR gate
74AUP1G0832
Min
-
-
-
-
-
-
−40 °C to +125 °C
(85 °C)
Max
-
-
-
-
-
-
© NXP B.V. 2010. All rights reserved.
(125 °C)
Max
-
-
-
-
-
-
9 of 19
Unit
pF
pF
pF
pF
pF
pF

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