X28C256KM-25 Xicor, X28C256KM-25 Datasheet

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X28C256KM-25

Manufacturer Part Number
X28C256KM-25
Description
Manufacturer
Xicor
Datasheet

Specifications of X28C256KM-25

Package
PGA
Date_code
03+

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X28C256KM-25
Manufacturer:
XICOR
Quantity:
16
Part Number:
X28C256KM-25
Manufacturer:
NS
Quantity:
550
256K
© Xicor, Inc. 1991, 1995 Patents Pending
3855-1.9 8/1/97 T1/C0/D8 EW
X28C256
FEATURES
PIN CONFIGURATION
V SS
I/O 0
I/O 1
I/O 2
A14
A 12
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
Access Time: 200ns
Simple Byte and Page Write
— Single 5V Supply
— Self-Timed
Low Power CMOS:
—Active: 60mA
—Standby: 200 A
Software Data Protection
— Protects Data Against System Level
High Speed Page Write Capability
Highly Reliable Direct Write
— Endurance: 100,000 Write Cycles
— Data Retention: 100 Years
Early End of Write Detection
— DATA Polling
—Toggle Bit Polling
—No External High Voltages or V
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Inadvertent Writes
PLASTIC DIP
FLAT PACK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Circuits
CERDIP
X28C256
SOIC
3855 FHD F02
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V CC
WE
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/0 4
I/O 3
I/O 0
NC
A 6
A 5
A 4
A 3
A 2
A 1
A 0
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
5 Volt, Byte Alterable E
4
Cell
3
X28C256
2
PLCC
LCC
PP
1 32 31 30
Control
3855 FHD F03
X28C256
29
28
27
26
25
24
23
22
21
A 8
A 9
A 11
NC
OE
A 10
CE
I/O 7
I/O 6
1
DESCRIPTION
The X28C256 is an 32K x 8 E
Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C256 is a 5V only device. The
X28C256 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard RAMs.
The X28C256 supports a 64-byte page write operation,
effectively providing a 78 s/byte write cycle and en-
abling the entire memory to be typically written in less
than 2.5 seconds. The X28C256 also features DATA
and Toggle Bit Polling, a system software support
scheme used to indicate the early completion of a write
cycle. In addition, the X28C256 includes a user-optional
software data protection mode that further enhances
Xicor’s hardware write protect capability.
Xicor E
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
V SS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
A 10
NC
NC
CE
A 2
A 1
A 0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
2
PROMs are designed and tested for applica-
2
PROM
X28C256
TSOP
Characteristics subject to change without notice
2
PROM, fabricated with
32K x 8 Bit
3855 ILL F23
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A 3
A 4
A 5
A 6
A 7
A 12
A 14
NC
V CC
NC
WE
A 13
A 8
A 9
A 11
OE

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