74AUP1G97GM,115 NXP Semiconductors, 74AUP1G97GM,115 Datasheet - Page 3
![IC CONFIG MULT-FUNC GATE 6-XSON](/photos/1/39/13915/6-xson_sot886_pkg_sml.jpg)
74AUP1G97GM,115
Manufacturer Part Number
74AUP1G97GM,115
Description
IC CONFIG MULT-FUNC GATE 6-XSON
Manufacturer
NXP Semiconductors
Series
74AUPr
Datasheet
1.74AUP1G97GM115.pdf
(22 pages)
Specifications of 74AUP1G97GM,115
Number Of Circuits
1
Package / Case
6-XSON (Micropak™), SOT-886
Logic Type
Configurable Multiple Function
Number Of Inputs
3
Schmitt Trigger Input
Yes
Output Type
Single-Ended
Current - Output High, Low
4mA, 4mA
Voltage - Supply
0.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Product
MUX Gates
Logic Family
74AUP
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
23 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 125 C
Output Current
20 mA
Output Voltage
3.6 V
Power Dissipation
250 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4390-2
74AUP1G97GM-G
74AUP1G97GM-G
935279963115
74AUP1G97GM-G
74AUP1G97GM-G
935279963115
NXP Semiconductors
6. Pinning information
Table 3.
7. Functional description
Table 4.
[1]
74AUP1G97
Product data sheet
Symbol
B
GND
A
Y
V
C
Input
C
L
L
L
L
H
H
H
H
Fig 2.
CC
H = HIGH voltage level;
L = LOW voltage level.
GND
B
A
Pin configuration SOT363
Pin description
Function table
1
2
3
74AUP1G97
6.1 Pinning
6.2 Pin description
001aad999
Pin
1
2
3
4
5
6
[1]
6
5
4
C
V
Y
B
L
L
H
H
L
L
H
H
CC
Description
data input
ground (0 V)
data input
data output
supply voltage
data input
All information provided in this document is subject to legal disclaimers.
Fig 3.
Rev. 6 — 10 January 2011
GND
Pin configuration SOT886
B
A
Transparent top view
74AUP1G97
1
2
3
A
L
H
L
H
L
H
L
H
001aae000
6
5
4
Low-power configurable multiple function gate
C
V
Y
CC
Fig 4.
GND
Pin configuration SOT891,
SOT1115 and SOT1202
Output
Y
L
L
H
H
L
H
L
H
B
A
Transparent top view
74AUP1G97
74AUP1G97
1
2
3
© NXP B.V. 2011. All rights reserved.
001aae001
6
5
4
C
V
Y
CC
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