74LVC1G57GV,125 NXP Semiconductors, 74LVC1G57GV,125 Datasheet

IC CONFIG MULTI-FUNC GATE SC-74

74LVC1G57GV,125

Manufacturer Part Number
74LVC1G57GV,125
Description
IC CONFIG MULTI-FUNC GATE SC-74
Manufacturer
NXP Semiconductors
Series
74LVCr
Datasheet

Specifications of 74LVC1G57GV,125

Number Of Circuits
1
Package / Case
SC-74-6
Logic Type
Configurable Multiple Function
Number Of Inputs
3
Schmitt Trigger Input
Yes
Output Type
Single-Ended
Current - Output High, Low
32mA, 32mA
Voltage - Supply
1.65 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Logic Family
LVC
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
3.8 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.65 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4835-2
74LVC1G57GV,125
74LVC1G57GV-G
74LVC1G57GV-G
935276073125
1. General description
2. Features and benefits
The 74LVC1G57 provides configurable multiple functions. The output state is determined
by eight patterns of 3-bit input. The user can choose the logic functions AND, OR, NAND,
NOR, XNOR, inverter and buffer. All inputs can be connected to V
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
The I
the device when it is powered down.
All inputs (A, B and C) have Schmitt-trigger action. They are capable of transforming
slowly changing input signals into sharply defined, jitter-free output signals.
74LVC1G57
Low-power configurable multiple function gate
Rev. 4 — 15 October 2010
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
Complies with JEDEC standard:
ESD protection:
±24 mA output drive (V
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C.
OFF
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8B/JESD36 (2.7 V to 3.6 V).
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
circuitry disables the output, preventing the damaging backflow current through
CC
= 3.0 V)
CC
Product data sheet
or GND.
OFF
.

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74LVC1G57GV,125 Summary of contents

Page 1

Low-power configurable multiple function gate Rev. 4 — 15 October 2010 1. General description The 74LVC1G57 provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the logic functions AND, ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range −40 °C to +125 °C 74LVC1G57GW −40 °C to +125 °C 74LVC1G57GV −40 °C to +125 °C 74LVC1G57GM −40 °C to +125 °C 74LVC1G57GF −40 °C to +125 °C 74LVC1G57GN −40 °C to +125 °C 74LVC1G57GS 4 ...

Page 3

... NXP Semiconductors 6. Pinning information 6.1 Pinning 74LVC1G57 GND 001aaf138 Fig 2. Pin configuration SOT363 and SOT457 6.2 Pin description Table 3. Pin description Symbol Pin B 1 GND Functional description [1] Table 4. Function table Input [ HIGH voltage level LOW voltage level. 74LVC1G57 Product data sheet ...

Page 4

... NXP Semiconductors 7.1 Logic configurations Table 5. Function selection table Logic function 2-input AND 2-input AND with both inputs inverted 2-input NAND with inverted input 2-input OR with inverted input 2-input NOR 2-input NOR with both inputs inverted 2-input XNOR Inverter Buffer Fig 5. ...

Page 5

... NXP Semiconductors Fig 11. Buffer 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC I input clamping current IK V input voltage I I output clamping current OK V output voltage ...

Page 6

... NXP Semiconductors 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V LOW-level output voltage = 100 μ HIGH-level output voltage = −100 μ −4 mA −8 mA −12 mA −24 mA −32 mA input leakage GND current ...

Page 7

... NXP Semiconductors 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions t propagation delay see power dissipation capacitance [1] Typical values are measured at nominal V [ the same as t and t pd PLH PHL [ used to determine the dynamic power dissipation (P PD × ...

Page 8

... NXP Semiconductors Table 10. Measurement points Supply voltage Input 1. 1.95 V 0.5V 2 2.7 V 0.5V 2.7 V 1 3.6 V 1 5.5 V 0.5V Measurement points are given in Definitions test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Z ...

Page 9

... NXP Semiconductors 13. Transfer characteristics Table 12. Transfer characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V positive-going see T+ threshold voltage Figure 16 V negative-going see T− threshold voltage Figure 16 V hysteresis voltage (V H see Figure 16 [1] Typical values are measured ...

Page 10

... NXP Semiconductors T− Fig 16. Transfer characteristic Fig 18. Typical 74LVC1G57 transfer characteristic; V 74LVC1G57 Product data sheet mnb154 Fig 17. Definition (mA 3 All information provided in this document is subject to legal disclaimers. Rev. 4 — 15 October 2010 74LVC1G57 Low-power configurable multiple function gate T− and V limits are and 20 %. ...

Page 11

... NXP Semiconductors 15. Package outline Plastic surface-mounted package; 6 leads y 6 pin 1 index DIMENSIONS (mm are the original dimensions UNIT max 1.1 0.30 0.25 mm 0.1 0.8 0.20 0.10 OUTLINE VERSION IEC SOT363 Fig 19. Package outline SOT363 (SC-88) 74LVC1G57 Product data sheet scale 2.2 1.35 2 ...

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... NXP Semiconductors Plastic surface-mounted package (TSOP6); 6 leads y 6 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) UNIT 0.1 0.40 1.1 0.26 mm 0.013 0.25 0.9 0.10 OUTLINE VERSION IEC SOT457 Fig 20. Package outline SOT457 (SC-74) 74LVC1G57 Product data sheet scale 3.1 1.7 3 ...

Page 13

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1. 6× (2) terminal 1 index area DIMENSIONS (mm are the original dimensions) ( UNIT b D max max 0.25 1.5 mm 0.5 0.04 0.17 1.4 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. ...

Page 14

... NXP Semiconductors XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 0 6× (1) terminal 1 index area DIMENSIONS (mm are the original dimensions UNIT b D max max 0.20 1.05 mm 0.5 0.04 0.12 0.95 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION IEC SOT891 Fig 22 ...

Page 15

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 0.9 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 0.95 mm nom 0.15 0.90 min 0.12 0.85 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 16

... NXP Semiconductors XSON6: extremely thin small outline package; no leads; 6 terminals; body 1.0 x 1 (6×) terminal 1 index area Dimensions (1) Unit max 0.35 0.04 0.20 1.05 mm nom 0.15 1.00 min 0.12 0.95 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. ...

Page 17

... NXP Semiconductors 16. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor TTL Transistor-Transistor Logic HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model DUT Device Under Test 17. Revision history Table 14. Revision history Document ID Release date 74LVC1G57 v.4 20101015 • Modifications: Added type number 74LVC1G57GN (SOT1115/XSON6 package). • ...

Page 18

... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

Page 19

... NXP Semiconductors Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 19. Contact information For more information, please visit: For sales office addresses, please send an email to: 74LVC1G57 Product data sheet Low-power configurable multiple function gate 18 ...

Page 20

... NXP Semiconductors 20. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 7.1 Logic configurations . . . . . . . . . . . . . . . . . . . . . 4 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 12 Waveforms ...

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