UPD720102GCYEBA NEC, UPD720102GCYEBA Datasheet
UPD720102GCYEBA
Manufacturer Part Number
UPD720102GCYEBA
Description
TQFP
Manufacturer
NEC
Datasheet
1.UPD720102GCYEBA.pdf
(32 pages)
Specifications of UPD720102GCYEBA
Date_code
09+
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Document No.
Date Published June 2006 NS CP (K)
Printed in Japan
specification for full-/low-speed signaling and Intel's enhanced host controller interface specification for high-speed
signaling and works up to 480 Mbps. The
2.0 transceivers into a single chip.
FEATURES
• Compliant with universal serial bus specification revision 2.0 (data rate: 1.5/12/480 Mbps)
• Compliant with open host controller interface specification for USB release 1.0a
• Compliant with enhanced host controller interface specification for USB revision 1.0
• PCI multi-function device consists of one OHCI host controller core for full-/low-speed signaling and one EHCI host
• Root hub with 3 (Max.) downstream facing ports which are shared by OHCI and EHCI host controller cores
• All downstream facing ports can handle high-speed (480 Mbps), full-speed (12 Mbps), and low-speed (1.5 Mbps)
• Supports hyper-speed transfer mode using HSMODE signal
• 32-bit 33 MHz host interface compliant with PCI specification revision 2.2
• Supports PCI mobile design guide version 1.1
• Supports PCI-bus power management interface specification revision 1.1
• PCI bus bus-master access
• Supports 3.3 V PCI
• System clock is generated by 30 MHz crystal or 48 MHz clock input
• Operational registers direct-mapped to PCI memory space
• 3.3 V single power supply, 1.5 V internal operating voltage from on chip regulator
• On chip Rs and Rpd resistors for USB signals
ORDERING INFORMATION
Detailed function descriptions are provided in the following user’s manual. Be sure to read the manual before designing.
The
controller core for high-speed signaling
transaction
μ
S17998EJ2V0DS00 (2nd edition)
PD720102GC-YEB-A
μ
PD720102 complies with the universal serial bus specification revision 2.0 and open host controller interface
Part Number
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
120-pin plastic TQFP (fine pitch) (14 × 14)
USB 2.0 HOST CONTROLLER
The mark "<R>" shows major revised points.
μ
PD720102 User’s Manual: S17999E
DATA SHEET
μ
PD720102 is integrated 2 host controller cores with PCI interface and USB
Package
MOS INTEGRATED CIRCUIT
Lead-free product
μ
Remark
PD720102
2006
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