AM29LV800BB120EC Advanced Micro Devices, AM29LV800BB120EC Datasheet

AM29LV800BB120EC

Manufacturer Part Number

AM29LV800BB120EC

Description

TSOP48

Manufacturer

Advanced Micro Devices

Datasheets

1.AM29LV800BB120EC.pdf (42 pages)

2.AM29LV800BB120EE.pdf (45 pages)

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Am29LV800B

8 Megabit (1 M x 8-Bit/512 K x 16-Bit)

CMOS 3.0 Volt-only Boot Sector Flash Memory

DISTINCTIVE CHARACTERISTICS

This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data

Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.

Single power supply operation

— 2.7 to 3.6 volt read and write operations for

Manufactured on 0.32 µm process technology

— Compatible with 0.5 µm Am29LV800 device

High performance

— Access times as fast as 70 ns

Ultra low power consumption (typical values at

5 MHz)

— 200 nA Automatic Sleep mode current

— 200 nA standby mode current

— 7 mA read current

— 15 mA program/erase current

Flexible sector architecture

— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and

— One 8 Kword, two 4 Kword, one 16 Kword, and

— Supports full chip erase

— Sector Protection features:

Unlock Bypass Program Command

— Reduces overall programming time when issuing

Top or bottom boot block configurations

available

battery-powered applications

fifteen 64 Kbyte sectors (byte mode)

fifteen 32 Kword sectors (word mode)

A hardware method of locking a sector to prevent

any program or erase operations within that sector

Sectors can be locked in-system or via

programming equipment

Temporary Sector Unprotect feature allows code

changes in previously locked sectors

multiple program command sequences

Embedded Algorithms

— Embedded Erase algorithm automatically

— Embedded Program algorithm automatically

Minimum 1 million write cycle guarantee

per sector

20-year data retention at 125 C

— Reliable operation for the life of the system

Package option

— 48-ball FBGA

— 48-pin TSOP

— 44-pin SO

— Known Good Die (KGD)

Compatibility with JEDEC standards

— Pinout and software compatible with single-

— Superior inadvertent write protection

Data# Polling and toggle bits

— Provides a software method of detecting program

Ready/Busy# pin (RY/BY#)

— Provides a hardware method of detecting

Erase Suspend/Erase Resume

— Suspends an erase operation to read data from,

Hardware reset pin (RESET#)

— Hardware method to reset the device to reading

preprograms and erases the entire chip or any

combination of designated sectors

writes and verifies data at specified addresses

(see publication number 21536)

power supply Flash

or erase operation completion

program or erase cycle completion

or program data to, a sector that is not being

erased, then resumes the erase operation

array data

Publication# 21490

Issue Date: August 14, 2000

Rev: G Amendment/+2

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