AM29LV160BT80RWCC AMD [Advanced Micro Devices], AM29LV160BT80RWCC Datasheet - Page 9

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AM29LV160BT80RWCC

Manufacturer Part Number
AM29LV160BT80RWCC
Description
16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Writing Commands/Command Sequences
To write a command or command sequence (which in-
cludes programming data to the device and erasing
sectors of memory), the system must drive WE# and
CE# to V
For program operations, the BYTE# pin determines
whether the device accepts program data in bytes
or words. Refer to “Word/Byte Configuration” for
more information.
The device features an Unlock Bypass mode to facili-
tate faster programming. Once the device enters the Un-
lock Bypass mode, only two write cycles are required to
program a word or byte, instead of four. The “Word/Byte
Program Command Sequence” section has details on
programming data to the device using both standard and
Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sec-
tors, or the entire device. Tables 2 and 3 indicate the
address space that each sector occupies. A “sector ad-
dress” consists of the address bits required to uniquely
select a sector. The “Command Definitions” section
has details on erasing a sector or the entire chip, or
suspending/resuming the erase operation.
After the system writes the autoselect command se-
quence, the device enters the autoselect mode. The
system can then read autoselect codes from the inter-
nal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this
mode. Refer to the “Autoselect Mode” and “Autoselect
Command Sequence” sections for more information.
I
tive current specification for the write mode. The “AC
Characteristics” section contains timing specification
tables and timing diagrams for write operations.
Program and Erase Operation Status
During an erase or program operation, the system may
check the status of the operation by reading the status
CC2
in the DC Characteristics table represents the ac-
IL
, and OE# to V
IH
.
P R E L I M I N A R Y
Am29LV160B
bits on DQ7–DQ0. Standard read cycle timings and I
read specifications apply. Refer to “Write Operation
Status” for more information, and to “AC Characteris-
tics” for timing diagrams.
Standby Mode
When the system is not reading or writing to the device,
it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the
outputs are placed in the high impedance state, inde-
pendent of the OE# input.
The device enters the CMOS standby mode when the
CE# and RESET# pins are both held at V
(Note that this is a more restricted voltage range than
V
V
the standby current will be greater. The device requires
standard access time (t
device is in either of these standby modes, before it is
ready to read data.
If the device is deselected during erasure or program-
ming, the device draws active current until the
operation is completed.
In the DC Characteristics table, I
sents the standby current specification.
Automatic Sleep Mode
The automatic sleep mode minimizes Flash device
energy consumption. The device automatically
enables this mode when addresses remain stable for
t
independent of the CE#, WE#, and OE# control
signals. Standard address access timings provide new
data when addresses are changed. While in sleep
mode, output data is latched and always available to
the system. I
r epres en ts th e au to matic sle ep mod e curr ent
specification.
A C C
IH
CC
.) If CE# and RESET# are held at V
0.3 V, the device will be in the standby mode, but
+ 3 0 n s . T h e a u t o m a t i c s l e e p m o d e i s
CC4
in the DC Characteristics table
CE
) for read access when the
CC3
IH
and I
, but not within
CC
CC4
repre-
0.3 V.
CC
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