AM29LV160BT80RWCC AMD [Advanced Micro Devices], AM29LV160BT80RWCC Datasheet

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AM29LV160BT80RWCC

Manufacturer Part Number
AM29LV160BT80RWCC
Description
16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
Am29LV160B
16 Megabit (2 M x 8-Bit/1 M x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
— Regulated voltage range: 3.0 to 3.6 volt read
Manufactured on 0.35 µm process technology
Supports Common Flash Memory Interface
(CFI)
High performance
— Full voltage range: access times as fast as 90 ns
— Regulated voltage range: access times as fast
Ultra low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 9 mA read current
— 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
— One 8 Kword, two 4 Kword, one 16 Kword, and
— Supports full chip erase
— Sector Protection features:
Unlock Bypass Program Command
— Reduces overall programming time when
operations for battery-powered applications
and write operations and for compatibility with
high performance 3.3 volt microprocessors
as 80 ns
thirty-one 64 Kbyte sectors (byte mode)
thirty-one 32 Kword sectors (word mode)
A hardware method of locking a sector to
prevent any program or erase operations within
that sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
issuing multiple program command sequences
PRELIMINARY
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
— Embedded Program algorithm automatically
Minimum 1,000,000 write cycle guarantee per
sector
Package option
— 48-ball FBGA
— 48-pin TSOP
— 44-pin SO
CFI (Common Flash Interface) compliant
— Provides device-specific information to the
Compatibility with JEDEC standards
— Pinout and software compatible with single-
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
preprograms and erases the entire chip or any
combination of designated sectors
writes and verifies data at specified addresses
system, allowing host software to easily
reconfigure for different Flash devices
power supply Flash
program or erase operation completion
program or erase cycle completion (not
available on 44-pin SO)
or program data to, a sector that is not being
erased, then resumes the erase operation
array data
Publication# 21358
Issue Date: March 1998
Rev: F Amendment/+2

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AM29LV160BT80RWCC Summary of contents

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PRELIMINARY Am29LV160B 16 Megabit ( 8-Bit 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory DISTINCTIVE CHARACTERISTICS Single power supply operation — Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications — ...

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GENERAL DESCRIPTION The Am29LV160B Mbit, 3.0 Volt-only Flash memory organized as 2,097,152 bytes or 1,048,576 words. The device is offered in 48-ball FBGA, 44-pin SO, and 48-pin TSOP packages. The word-wide data (x16) appears on DQ15–DQ0; the ...

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PRODUCT SELECTOR GUIDE Family Part Number Regulated Voltage Range: V Speed Option Full Voltage Range: V Max access time ACC Max CE# access time Max OE# access time Note: ...

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CONNECTION DIAGRAMS A15 1 2 A14 A13 3 A12 4 A11 5 6 A10 A19 WE# 11 RESET RY/BY A18 A17 ...

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CONNECTION DIAGRAMS RESET# A18 A17 CE OE# 14 DQ0 15 DQ8 16 DQ1 17 DQ9 18 DQ2 19 DQ10 20 DQ3 21 DQ11 ...

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PIN CONFIGURATION A0–A19 = 20 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...

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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combi- nation) is formed by a combination of the elements below. AM29LV160B T 80R Valid Combinations AM29LV160BT80R, EC, FC, SC, WCC ...

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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is composed of latches ...

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Writing Commands/Command Sequences To write a command or command sequence (which in- cludes programming data to the device and erasing sectors of memory), the system must drive WE# and CE and OE ...

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RESET#: Hardware Reset Pin The RESET# pin provides a hardware method of reset- ting the device to reading array data. When the system drives the RESET# pin to V for at least a period the device immediately ...

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Table 2. Sector Address Tables (Am29LV160BT) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 ...

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Table 3. Sector Address Tables (Am29LV160BB) Sector A19 A18 A17 A16 SA0 SA1 SA2 SA3 SA4 SA5 ...

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Autoselect Mode The autoselect mode provides manufacturer and de- vice identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding ...

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START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...

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START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 2. Temporary Sector Unprotect ...

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Addresses Addresses (Word Mode) (Byte Mode) 1Bh 36h 1Ch 38h 1Dh 3Ah 1Eh 3Ch 1Fh 3Eh 20h 40h 21h 42h 22h 44h 23h 46h 24h 48h 25h 4Ah 26h 4Ch Addresses Addresses (Word Mode) (Byte Mode) 27h 4Eh 28h 50h ...

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Table 8. Primary Vendor-Specific Extended Query Addresses Addresses (Word Mode) (Byte Mode) 40h 80h 41h 82h 42h 84h 43h 86h 44h 88h 45h 8Ah 46h 8Ch 47h 8Eh 48h 90h 49h 92h 4Ah 94h 4Bh 96h 4Ch 98h Hardware Data ...

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COMMAND DEFINITIONS Writing specific address and data commands or se- quences into the command register initiates device op- erations. Table 9 defines the valid register command sequences. Writing incorrect address and data val- ues or writing them in the improper ...

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Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the program- ming operation. The Byte Program command se- quence should be reinitiated once the device has reset to ...

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The system can determine the status of the erase op- eration by using DQ7, DQ6, DQ2, or RY/BY#. See “Write Operation Status” for information on these sta- tus bits. When the Embedded Erase algorithm is com- plete, the device returns ...

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See “Autoselect Command Sequence” for more information. The system must write the Erase Resume command (address bits are “don’t care”) to exit the erase suspend mode and continue the sector erase operation. Further writes of the Resume command ...

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Table 9. Am29LV160B Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...

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WRITE OPERATION STATUS The device provides several bits to determine the sta- tus of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 10 and the following subsections describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...

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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...

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The remaining scenario is that the system initially de- termines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the ...

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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...

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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages . . . . . . . . . . . . . . . – +150 C Ambient Temperature with Power Applied ...

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DC CHARACTERISTICS CMOS Compatible Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Note 1) V Active Write Current CC I CC2 (Notes 2 ...

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DC CHARACTERISTICS (Continued) Zero Power Flash 500 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...

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TEST CONDITIONS Device Under Test C L 6.2 k Note: Diodes are IN3064 or equivalent Figure 11. Test Setup KEY TO SWITCHING WAVEFORMS WAVEFORM Don’t Care, Any Change Permitted 3.0 V 1.5 V Input 0.0 V Figure 12. Input Waveforms ...

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AC CHARACTERISTICS Read Operations Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output ...

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AC CHARACTERISTICS Hardware Reset (RESET#) Parameter JEDEC Std Description RESET# Pin Low (During Embedded Algorithms) t READY to Read or Write (See Note) RESET# Pin Low (NOT During Embedded t READY Algorithms) to Read or Write (See Note) t RESET# ...

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AC CHARACTERISTICS Word/Byte Configuration (BYTE#) Parameter JEDEC Std Description t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# BYTE# ...

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AC CHARACTERISTICS Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH ...

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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes program address program data Illustration shows device ...

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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE# t GHWL OE# WE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address for reading ...

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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...

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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Figure 21. ...

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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# Note: For sector protect For sector unprotect ...

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AC CHARACTERISTICS Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup Time DVEH ...

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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written ...

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ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume the following conditions 3.0 ...

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PHYSICAL DIMENSIONS* TS 048—48-Pin Standard TSOP (measured in millimeters) Pin 1 I. 1.20 MAX 0.25MM (0.0098") BSC * For reference only. BSC is an ANSI standard for Basic Space Centering. TSR048—48-Pin Reverse TSOP (measured in millimeters) Pin 1 ...

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PHYSICAL DIMENSIONS FGC—48-Ball Fine-Pitch Ball Grid Array (FBGA (measured in millimeters) DATUM B 0.025 CHAMFER INDEX 0.80 0.40 0.08 (48x) 0. 0.25 0.45 DETAIL A 1.20 MAX ...

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PHYSICAL DIMENSIONS SO 044—44-Pin Small Outline Package (measured in millimeters 1.27 NOM. TOP VIEW 28.00 28.40 2.17 2.45 0.35 0.50 SIDE VIEW 13.10 15.70 13.50 16.30 ...

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REVISION SUMMARY FOR AM29LV160B Revision F Distinctive Characteristics Changed typical read and program/erase current spec- ifications. Device now has a guaranteed minimum endurance of 1,000,000 write cycles. Figure 1, In-System Sector Protect/Unprotect Algorithm Corrected Changed wait specification ...

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