AM28F010A-150EI AMD [Advanced Micro Devices], AM28F010A-150EI Datasheet - Page 11

• Manufacturer Part Number: AM28F010A-150EI
• Description: 1 Megabit (128 K x 8-Bit) CMOS 12.0 Volt, Bulk Erase Flash Memory with Embedded Algorithms
• Manufacturer: AMD [Advanced Micro Devices]

ERASE, PROGRAM, AND READ MODE
When V
ister is active. All functions are available. That is, the
device can program, erase, read array or autoselect
data, or be standby mode.
Write Operations
High voltage must be applied to the V
activate the command register. Data written to the reg-
ister serves as input to the internal state machine. The
output of the state machine determines the operational
function of the device.
The command register does not occupy an address-
able memory location. The register is a latch that stores
the command, along with the address and data infor-
mation needed to execute the command. The register
is written by bringing WE# and CE# to V
is at V
WE#, while data is latched on the rising edge of the
WE# pulse. Standard microprocessor write timings are
used.
The device requires the OE# pin to be V
erations. This condition eliminates the possibility for
bus contention during programming operations. In
order to write, OE# must be V
must be V
command will not be executed.
Notes:
1. Bus operations are defined in Table 1.
2. RA = Address of the memory location to be read.
3. RD = Data read from location RA during read operation.
4. Please reference Reset Command section.
Read Memory (Note 4)
Read Auto select
Embedded Erase Set-up/
Embedded Erase
Embedded Program Set-up/
Embedded Program
Reset (Note 4)
PA = Address of the memory location to be programmed.
Addresses are latched on the falling edge of the WE
X = Don’t care.
PD = Data to be programmed at location PA. Data latched on the rising edge of WE
IH
PP
. Addresses are latched on the falling edge of
Command
IL
is equal to 12.0 V ± 5%, the command reg-
. If any pin is not in the correct state a write
Operation
IH
(Note 1)
, and CE# and WE#
Write
Write
Write
Write
Write
Table 3. Am28F010A Command Definitions
PP
IH
pin in order to
IL
, while OE#
for write op-
First Bus Cycle
Address
(Note 2)
X
X
X
X
X
#
Am28F010A
pulse.
80h or 90h
10h or 50h
Refer to AC Write Characteristics and the Erase/Pro-
gramming Waveforms for specific timing parameters.
Command Definitions
The contents of the command register default to 00h
(Read Mode) in the absence of high voltage applied to
the V
memory. High voltage on the V
command register. Device operations are selected by
writing specific data codes into the command register.
Table 3 in the device data sheet defines these register
commands.
Read Command
Memory contents can be accessed via the read com-
mand when V
00h into the command register. Standard microproces-
sor read cycles access data from the memory. The de-
vice will remain in the read mode until the command
register contents are altered.
The command register defaults to 00h (read mode)
upon V
fault helps ensure that inadvertent alteration of the
memory contents does not occur during the V
transition. Refer to the AC Read Characteristics and
Waveforms for the specific timing parameters.
(Note 3)
00h/FFh
00h/FFh
Data
30h
PP
PP
pin. The device operates as a read only
power-up. The 00h (Read Mode) register de-
PP
Operation
(Note 1)
Read
Read
Write
Write
Write
is high. To read from the device, write
#
.
Second Bus Cycle
Address
(Note 2)
00h/01h
RA
PA
X
X
PP
pin enables the
(Note 3)
01h/A2h
00h/FFh
Data
PP
30h
RD
PD
power
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