EVAL-ADF4151EB1Z AD [Analog Devices], EVAL-ADF4151EB1Z Datasheet - Page 4

• Manufacturer Part Number: EVAL-ADF4151EB1Z
• Description: Fractional-N/Integer-N PLL Synthesizer
• Manufacturer: AD [Analog Devices]

ADF4151
Parameter
NOISE CHARACTERISTICS
1
2
3
4
5
AC coupling ensures AV
T
The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log F
The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency (f
and at a frequency offset (f) is given by PN = P
Spurious measured on EVAL-ADF4151EB1Z with RF buffer between VCO output and RF input by-passed, using a Rohde & Schwarz FSUP signal source analyzer.
A
Normalized In-Band Phase Noise
Normalized 1/f Noise (PN
Normalized In-Band Phase Noise
Normalized 1/f Noise (PN
Spurious Signals Due to PFD
= 25°C; AV
Floor (PN
Floor (PN
Frequency
DD
SYNTH
SYNTH
= DV
5
PFD
)
)
DD
3
3
. PN
= 3.6 V; prescaler = 4/5; f
DD
SYNTH
/2 bias.
= PN
1_f
1_f
)
)
TOT
4
4
– 10 log f
1_f
+ 10 log(10 kHz/f) + 20 log(f
PFD
REFIN
– 20 log N
= 130 MHz; f
Min
B Version
PFD
= 26 MHz; f
Typ
−221
−118
−220
−115
−107
RF
/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL
Rev. B | Page 4 of 28
RF
= 1.742 GHz.
Max
Unit
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc
Conditions/Comments
PLL loop BW = 500 kHz (ABP = 3 ns)
10 kHz offset. Normalized to 1 GHz (ABP = 3 ns)
PLL loop BW = 500 kHz (ABP = 6 ns);
low noise mode
10 kHz offset; normalized to 1 GHz (ABP = 6 ns);
low noise mode
PFD = 25 MHz
Data Sheet
RF
)