LF2301 LODEV [LOGIC Devices Incorporated], LF2301 Datasheet - Page 4

• Manufacturer Part Number: LF2301
• Description: Image Resampling Sequencer
• Manufacturer: LODEV [LOGIC Devices Incorporated]

DEVICES INCORPORATED
R/C — Row/Column Select
When set to 0, the LF2301 functions as
a row device. When set to 1, the
LF2301 functions as a column device.
M
This 2-bit control word defines four
modes as follows (see table 1):
The 1st and 3rd modes are single-
pass operations where the device
walks through a (K + 1) x (K + 1)
kernel for each output pixel. K is the
kernel size determined by K
Parameter Register 7. In mode 00, the
spiral walk is in the clockwise direc-
tion. In mode 10, the spiral walk is in
the counter clockwise direction.
The 2nd and 4th modes are used
together to perform a two-pass
operation. The first pass (mode 01)
performs a (K+1) kernel in the
horizontal dimension. The second
pass (mode 11) performs a (K+1)
kernel in the vertical dimension.
The result of pass 1 is stored in the
destination image memory and is used
as the source image data for the second
pass. A system to switch source and
destination memory banks could be
designed, or utilization of a second
LF2301 pair in a pipelined architecture
could be used. In this case, the system
would require a third image buffer for
the final destination image.
K
Kernel determines the length of the
spiral walk when performing image
transformations and the size of the
filter when implementing static filters
(see table 2). When performing image
transformations, the longest spiral walk
M
T
0
0
1
1
3-0
1-0
1
ABLE
M
— Kernel
— Mode
0 single-pass operation (CW)
1 pass 1 of two-pass operation
0 single-pass operation (CCW)
1 pass 2 of two-pass operation
0
1. M
ODE
S
MODE
ELECTION
3-0
in
possible is 4 x 4 pixels (Kernel = 3). For
static filters, kernels of up to 16 x 16
pixels (Kernel = 15) are possible.
FOV — Field of View
FOV determines the distance between
pixels in a spiral walk. An FOV of 1
means each step in a spiral walk is one
pixel. An FOV of 2 means each step is
two pixels, and so on. FOV can be set
as high as 7 (see Table 3). It is impor-
tant to note when FOV is 0, the x and
y addresses will not change during a
spiral walk. They will remain fixed at
the first pixel address of the spiral
walk.
ALR — Autoload
When set HIGH and upon INIT being
strobed, the LDR control is automatically
asserted which causes the data
currently stored in the Preload Registers
to be loaded into the Transformation
Parameter Registers.
AIN — Autoinit
A new transform automatically begins
if the AIN bit is HIGH when the end of
an image is reached. The DONE flag
will go HIGH for one clock cycle. If
AIN is LOW, UWRI and the DONE flag
remain HIGH until the user strobes the
INIT control to begin a new image
transformation.
PIPE — Pipe Control
In order to compensate for buffered
source image RAM, PIPE adjusts the
timing of UWRI and ACC. If the PIPE
bit is HIGH, UWRI and ACC will have
a one clock cycle delay added relative
to the generation of the target address.
TM — Test Mode
Calculations of the source image and
coefficient addresses are made by an
internal 28-bit accumulator. TM
allows access to the sign bit and the
seven bits below the four coefficient
address bits in the accumulator. When
TM is HIGH the sign bit and 11 bits
below the source image address are fed
to X
11-0
(see Figure 2). When TM is
2-4
Image Resampling Sequencer
LOW, the source image address is fed
to X
to access both the MS and LS words of
the internal accumulator.
Functional Description
The LF2301 is an address generator
designed to be used in an image
transformation system (ITS). When
implementing an LF2301-based ITS,
second-order image transformations
can be performed like resampling,
rotation, warping, panning, and
rescaling, all at real-time video rates.
2D filtering operations, like pixel
convolutions, can also be performed.
In most applications two LF2301s are
used, one to generate the row addresses
and the other to generate the column
T
T
K
ABLE
ABLE
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
Video Imaging Products
11-0
3
F
0
0
0
0
1
1
1
1
2
. Two clock cycles are required
2. K
3. F
K
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
2
F
0
0
1
1
0
0
1
1
1
IELD
ERNEL
K
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
F
O
0
1
0
1
0
1
0
1
0
F
K
V
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
08/16/2000–LDS.2301-H
0
IEW
LF2301
10 x 10
11 x 11
12 x 12
13 x 13
14 x 14
15 x 15
16 x 16
Kernel
FOV
1 x 1
2 x 2
3 x 3
4 x 4
5 x 5
6 x 6
7 x 7
8 x 8
9 x 9
0
1
2
3
4
5
6
7